"""Type stubs for ymfm._core"""

from enum import IntEnum
from typing import Optional

from ._types import ChipOutput

class AccessClass(IntEnum):
    """Memory access type for external read/write operations."""

    IO = 0
    ADPCM_A = 1
    ADPCM_B = 2
    PCM = 3

class ChipInterface:
    """
    Base interface class for ymfm chip callbacks.

    This class can be subclassed in Python to provide custom behavior for
    timer management, IRQ handling, and external memory access.
    """
    def __init__(self) -> None: ...
    def sync_mode_write(self, data: int) -> None:
        """Called when the mode register is written (for synchronization)."""
        ...
    def sync_check_interrupts(self) -> None:
        """Process pending interrupts."""
        ...
    def set_timer(self, timer_num: int, duration: int) -> None:
        """
        Called when a timer should be set.

        Args:
            timer_num: Timer number (0 or 1)
            duration: Duration in chip clocks, or -1 to disable
        """
        ...
    def set_busy_end(self, clocks: int) -> None:
        """Set the busy end time in clocks."""
        ...
    def is_busy(self) -> bool:
        """Check if the chip is currently busy."""
        ...
    def update_irq(self, asserted: bool) -> None:
        """Called when IRQ state changes."""
        ...
    def external_read(self, access_type: AccessClass, address: int) -> int:
        """
        Read from external memory (ADPCM/PCM data).

        Args:
            access_type: Type of access (AccessClass enum)
            address: Memory address to read

        Returns:
            Byte value at the address
        """
        ...
    def external_write(self, access_type: AccessClass, address: int, data: int) -> None:
        """
        Write to external memory.

        Args:
            access_type: Type of access (AccessClass enum)
            address: Memory address to write
            data: Byte value to write
        """
        ...

class MemoryInterface(ChipInterface):
    """
    Interface with built-in memory buffer support.

    This interface provides a simple way to supply ADPCM/PCM data
    to chips that require external memory.
    """
    def __init__(self) -> None: ...
    def set_memory(self, data: bytes) -> None:
        """Set the memory buffer (bytes object)."""
        ...
    def get_memory(self) -> bytes:
        """Get the current memory buffer."""
        ...

class SsgOverride:
    """
    Interface for providing custom SSG (AY-3-8910 / YM2149) implementations.

    Some FM chips (YM2203, YM2608, YM2610, YMF288) include an SSG component.
    Subclass this to provide a custom SSG implementation.
    """
    def __init__(self) -> None: ...
    def ssg_reset(self) -> None:
        """Reset the SSG to initial state."""
        ...
    def ssg_read(self, regnum: int) -> int:
        """Read from SSG register."""
        ...
    def ssg_write(self, regnum: int, data: int) -> None:
        """Write to SSG register."""
        ...
    def ssg_prescale_changed(self) -> None:
        """Called when the SSG prescaler has changed."""
        ...

# OPL Family

class YM3526:
    """OPL - 9 FM channels, mono output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class Y8950:
    """MSX-Audio - 9 FM channels + ADPCM, mono output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM3812:
    """OPL2 - 9 FM channels, 4 waveforms, mono output (Sound Blaster)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF262:
    """OPL3 - 18 FM channels, 8 waveforms, 4-channel output (Sound Blaster Pro/16)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM2413:
    """OPLL - 9 FM channels, 15 preset instruments, mono output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF289B:
    """OPL3L - OPL3 variant with 2-channel stereo output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_data(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF278B:
    """OPL4 - OPL3 + wavetable PCM, 6-channel output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_data_pcm(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_address_pcm(self, data: int) -> None: ...
    def write_data_pcm(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM2423:
    """OPLL variant - 9 FM channels with alternate preset instruments."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF281:
    """OPLLP - OPLL variant with alternate preset instruments."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class DS1001:
    """VRC7 - Konami OPLL variant used in NES games."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

# OPN Family

class YM2203:
    """OPN - 3 FM channels + SSG, stereo output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

class YM2608:
    """OPNA - 6 FM channels + SSG + ADPCM, 3-channel output (PC-98)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_status_hi(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

class YM2610:
    """OPNB - 4 FM channels + SSG + ADPCM, stereo output (Neo Geo)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_status_hi(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

class YM2610B:
    """OPNB variant - 6 FM channels + SSG + ADPCM, stereo output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_status_hi(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

class YM2612:
    """OPN2 - 6 FM channels, stereo output (Sega Genesis/Mega Drive)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM3438:
    """OPN2C - YM2612 variant with improved DAC, stereo output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF276:
    """OPN2 variant - YM2612 with improved DAC accuracy."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YMF288:
    """OPN3L - 6 FM + SSG + ADPCM-A, 3-channel output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_status_hi(self) -> int: ...
    def read_data(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write_address_hi(self, data: int) -> None: ...
    def write_data_hi(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

# OPM Family

class YM2151:
    """OPM - 8 FM channels, 4 operators each, stereo output (Sharp X68000, arcade)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM2164:
    """OPP - YM2151 variant with half-speed Timer B, stereo output."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

# SSG Family

class YM2149:
    """SSG/PSG - 3 square wave channels + noise (AY-3-8910 compatible)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read_data(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    def set_ssg_override(self, override: Optional[SsgOverride]) -> None:
        """Set a custom SSG implementation to override the internal SSG."""
        ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
    @property
    def ssg_override(self) -> Optional[SsgOverride]: ...

# OPZ Family

class YM2414:
    """OPZ - 8 FM channels, 4 operators (TX81Z/DX11 synthesizer)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

# OPQ Family

class YM3806:
    """OPQ - 8 FM channels, 2 operators (arcade)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...

class YM3533:
    """OPQ variant - 8 FM channels, 2 operators (arcade)."""
    def __init__(
        self, clock: int, interface: Optional[ChipInterface] = None
    ) -> None: ...
    def reset(self) -> None: ...
    def read_status(self) -> int: ...
    def read(self, offset: int) -> int: ...
    def write_address(self, data: int) -> None: ...
    def write_data(self, data: int) -> None: ...
    def write(self, offset: int, data: int) -> None: ...
    def generate(self, num_samples: int = 1) -> ChipOutput: ...
    def save_state(self) -> bytes: ...
    def load_state(self, data: bytes) -> None: ...
    @property
    def sample_rate(self) -> int: ...
    @property
    def clock(self) -> int: ...
    @property
    def outputs(self) -> int: ...
    @property
    def interface(self) -> ChipInterface: ...
