# TRME Architecture Specification (ISA)

This document defines the Instruction Set Architecture (ISA) for the Tensor-RNS-Multipole Engine (TRME), a novel non-von Neumann architecture designed for post-silicon computing paradigms.

## 1. Overview

The TRME ISA is a 128-bit VLIW (Very Long Instruction Word) architecture designed to dispatch instructions to heterogeneous coprocessors:
1.  **RNS Core:** Residue Number System Arithmetic Unit.
2.  **Tropical Core:** Max-Plus Algebra Unit.
3.  **Multipole Core:** FMM (Fast Multipole Method) Accelerator.
4.  **Optical Interface:** Coherent Optical Processor Interface.

## 2. Register File

The architecture uses a unified "Tensor Register File" (TRF).

| Register | Width | Description |
| :--- | :--- | :--- |
| `T0` - `T31` | 4096-bit | General Purpose Tensor Registers (holds 32x32 tiles of int4/int8) |
| `S0` - `S15` | 64-bit | Scalar Registers (Control/Loop counters) |
| `M0` - `M7` | 256-bit | Moduli Registers (RNS configurations) |

## 3. Instruction Format

Instructions are 128-bit wide, allowing for bundle dispatch.

`[ Opcode (8) | Flags (8) | Dest (8) | Src1 (8) | Src2 (8) | Immediate/Ext (88) ]`

## 4. Core Instruction Set

### 4.1. Data Movement

*   **`TLOAD Td, [Sr]`**: Load a Tensor Tile from memory address in scalar register `Sr` to `Td`.
*   **`TSTORE [Sr], Ts`**: Store Tensor Tile `Ts` to memory address in `Sr`.
*   **`TPREFETCH [Sr]`**: Prefetch data into L1 Tensor Cache.

### 4.2. RNS Arithmetic (Residue Number System)

*   **`RNS.SET M0, imm`**: Set the RNS moduli set (e.g., `{255, 253, 251}`).
*   **`RNS.FWD Td, Ts`**: Forward Transform. Convert binary integer tensor `Ts` into RNS representation in `Td`.
*   **`RNS.ADD Td, Ts1, Ts2`**: Modular Addition. `Td = (Ts1 + Ts2) % M` (Parallel across moduli).
*   **`RNS.MUL Td, Ts1, Ts2`**: Modular Multiplication. `Td = (Ts1 * Ts2) % M`.
*   **`RNS.BWD Td, Ts`**: Backward Transform (CRT). Reconstruct integer from RNS.

### 4.3. Tropical Algebra (Max-Plus)

*   **`TROP.ADD Td, Ts1, Ts2`**: Tropical Addition. `Td[i] = max(Ts1[i], Ts2[i])`.
*   **`TROP.MUL Td, Ts1, Ts2`**: Tropical Multiplication. `Td[i] = Ts1[i] + Ts2[i]`.
*   **`TROP.GEMM Td, Ts1, Ts2`**: Tropical Matrix Multiplication. `Td[i,j] = max_k (Ts1[i,k] + Ts2[k,j])`.

### 4.4. Method of Four Russians (RSR)

*   **`RSR.GENLUT T_lut, T_B`**: Generate Lookup Table from Matrix B (`T_B`) and store in specialized cache `T_lut`.
*   **`RSR.MATMUL Td, T_A, T_lut`**: Perform multiplication using Matrix A (`T_A`) indices against the Lookup Table.

### 4.5. Fast Multipole Method (FMM)

*   **`FMM.EXPAND Td, Ts, order`**: Compute Multipole Expansion of source distribution `Ts` up to `order`.
*   **`FMM.M2L Td, Ts`**: Multipole-to-Local translation.
*   **`FMM.EVAL Td, Ts`**: Evaluate potentials at target points.

### 4.6. Optical Coprocessor

*   **`OPT.FFT Td, Ts`**: Dispatch Tensor `Ts` to Optical Fourier Transform Unit.
*   **`OPT.CONV Td, Ts1, Ts2`**: Perform frequency-domain convolution via optical interference.

### 4.7. Geometric Algebra (Clifford)

*   **`GEO.MUL Td, Ts1, Ts2`**: Geometric Product of multivectors. `Td = Ts1 * Ts2`.
*   **`GEO.ROT Td, Ts, Tr`**: Rotate multivector `Ts` by rotor `Tr`. `Td = Tr * Ts * ~Tr`.

### 4.8. Logarithmic Number System (LNS)

*   **`LNS.ADD Td, Ts1, Ts2`**: Add LNS numbers. `Td = Ts1 + Ts2` (implemented as `max(s1, s2) + log(1 + 2^-|s1-s2|)`).
*   **`LNS.MUL Td, Ts1, Ts2`**: Multiply LNS numbers. `Td = Ts1 + Ts2` (Integer Add).

## 5. Pipeline

The TRME pipeline consists of 7 stages:

1.  **Fetch**: Retrieve 128-bit instruction bundle.
2.  **Decode**: Split bundle to RNS/Tropical/Vector units.
3.  **Map**: Map virtual tensor registers to physical banks.
4.  **RNS Fwd / Pre-process**: Convert formats (Binary -> RNS).
5.  **Execute**:
    *   *Lane A*: RNS ALU
    *   *Lane B*: Tropical ALU
    *   *Lane C*: RSR/Vector Engine
6.  **RNS Bwd / Post-process**: CRT reconstruction / Normalization.
7.  **Writeback**: Update TRF.
