from enum import Enum

__NAMESPACE__ = "http://www.accellera.org/XMLSchema/IPXACT/1685-2014"


class SimpleFileType(Enum):
    UNKNOWN = "unknown"
    C_SOURCE = "cSource"
    CPP_SOURCE = "cppSource"
    ASM_SOURCE = "asmSource"
    VHDL_SOURCE = "vhdlSource"
    VHDL_SOURCE_87 = "vhdlSource-87"
    VHDL_SOURCE_93 = "vhdlSource-93"
    VERILOG_SOURCE = "verilogSource"
    VERILOG_SOURCE_95 = "verilogSource-95"
    VERILOG_SOURCE_2001 = "verilogSource-2001"
    SW_OBJECT = "swObject"
    SW_OBJECT_LIBRARY = "swObjectLibrary"
    VHDL_BINARY_LIBRARY = "vhdlBinaryLibrary"
    VERILOG_BINARY_LIBRARY = "verilogBinaryLibrary"
    UNELABORATED_HDL = "unelaboratedHdl"
    EXECUTABLE_HDL = "executableHdl"
    SYSTEM_VERILOG_SOURCE = "systemVerilogSource"
    SYSTEM_VERILOG_SOURCE_3_0 = "systemVerilogSource-3.0"
    SYSTEM_VERILOG_SOURCE_3_1 = "systemVerilogSource-3.1"
    SYSTEM_CSOURCE = "systemCSource"
    SYSTEM_CSOURCE_2_0 = "systemCSource-2.0"
    SYSTEM_CSOURCE_2_0_1 = "systemCSource-2.0.1"
    SYSTEM_CSOURCE_2_1 = "systemCSource-2.1"
    SYSTEM_CSOURCE_2_2 = "systemCSource-2.2"
    VERA_SOURCE = "veraSource"
    E_SOURCE = "eSource"
    PERL_SOURCE = "perlSource"
    TCL_SOURCE = "tclSource"
    OVASOURCE = "OVASource"
    SVASOURCE = "SVASource"
    PSL_SOURCE = "pslSource"
    SYSTEM_VERILOG_SOURCE_3_1A = "systemVerilogSource-3.1a"
    SDC = "SDC"
    VHDL_AMS_SOURCE = "vhdlAmsSource"
    VERILOG_AMS_SOURCE = "verilogAmsSource"
    SYSTEM_CAMS_SOURCE = "systemCAmsSource"
    LIBERTY_SOURCE = "libertySource"
    USER = "user"
