// Generated by PeakRDL-regblock - A free and open-source SystemVerilog generator
//  https://github.com/SystemRDL/PeakRDL-regblock

module I3CCSR (
        input wire clk,
        input wire rst,

        input wire s_apb_psel,
        input wire s_apb_penable,
        input wire s_apb_pwrite,
        input wire [9:0] s_apb_paddr,
        input wire [31:0] s_apb_pwdata,
        output logic s_apb_pready,
        output logic [31:0] s_apb_prdata,
        output logic s_apb_pslverr,

        input I3CCSR_pkg::I3CCSR__in_t hwif_in,
        output I3CCSR_pkg::I3CCSR__out_t hwif_out
    );

    //--------------------------------------------------------------------------
    // CPU Bus interface logic
    //--------------------------------------------------------------------------
    logic cpuif_req;
    logic cpuif_req_is_wr;
    logic [9:0] cpuif_addr;
    logic [31:0] cpuif_wr_data;
    logic [31:0] cpuif_wr_biten;
    logic cpuif_req_stall_wr;
    logic cpuif_req_stall_rd;

    logic cpuif_rd_ack;
    logic cpuif_rd_err;
    logic [31:0] cpuif_rd_data;

    logic cpuif_wr_ack;
    logic cpuif_wr_err;

    // Request
    logic is_active;
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            is_active <= '0;
            cpuif_req <= '0;
            cpuif_req_is_wr <= '0;
            cpuif_addr <= '0;
            cpuif_wr_data <= '0;
        end else begin
            if(~is_active) begin
                if(s_apb_psel) begin
                    is_active <= '1;
                    cpuif_req <= '1;
                    cpuif_req_is_wr <= s_apb_pwrite;
                    cpuif_addr <= {s_apb_paddr[9:2], 2'b0};
                    cpuif_wr_data <= s_apb_pwdata;
                end
            end else begin
                cpuif_req <= '0;
                if(cpuif_rd_ack || cpuif_wr_ack) begin
                    is_active <= '0;
                end
            end
        end
    end
    assign cpuif_wr_biten = '1;

    // Response
    assign s_apb_pready = cpuif_rd_ack | cpuif_wr_ack;
    assign s_apb_prdata = cpuif_rd_data;
    assign s_apb_pslverr = cpuif_rd_err | cpuif_wr_err;

    logic cpuif_req_masked;
    logic external_req;
    logic external_pending;
    logic external_wr_ack;
    logic external_rd_ack;
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            external_pending <= '0;
        end else begin
            if(external_req & ~external_wr_ack & ~external_rd_ack) external_pending <= '1;
            else if(external_wr_ack | external_rd_ack) external_pending <= '0;
            `ifndef SYNTHESIS
                assert(!external_wr_ack || (external_pending | external_req))
                    else $error("An external wr_ack strobe was asserted when no external request was active");
                assert(!external_rd_ack || (external_pending | external_req))
                    else $error("An external rd_ack strobe was asserted when no external request was active");
            `endif
        end
    end

    // Read & write latencies are balanced. Stalls not required
    // except if external
    assign cpuif_req_stall_rd = external_pending;
    assign cpuif_req_stall_wr = external_pending;
    assign cpuif_req_masked = cpuif_req
                            & !(!cpuif_req_is_wr & cpuif_req_stall_rd)
                            & !(cpuif_req_is_wr & cpuif_req_stall_wr);

    //--------------------------------------------------------------------------
    // Address Decode
    //--------------------------------------------------------------------------
    typedef struct {
        struct {
            struct {
                logic EXTCAP_HEADER;
                logic PROT_CAP_0;
                logic PROT_CAP_1;
                logic PROT_CAP_2;
                logic PROT_CAP_3;
                logic DEVICE_ID_0;
                logic DEVICE_ID_1;
                logic DEVICE_ID_2;
                logic DEVICE_ID_3;
                logic DEVICE_ID_4;
                logic DEVICE_ID_5;
                logic DEVICE_ID_RESERVED;
                logic DEVICE_STATUS_0;
                logic DEVICE_STATUS_1;
                logic DEVICE_RESET;
                logic RECOVERY_CTRL;
                logic RECOVERY_STATUS;
                logic HW_STATUS;
                logic INDIRECT_FIFO_CTRL_0;
                logic INDIRECT_FIFO_CTRL_1;
                logic INDIRECT_FIFO_STATUS_0;
                logic INDIRECT_FIFO_STATUS_1;
                logic INDIRECT_FIFO_STATUS_2;
                logic INDIRECT_FIFO_STATUS_3;
                logic INDIRECT_FIFO_STATUS_4;
                logic INDIRECT_FIFO_RESERVED;
                logic INDIRECT_FIFO_DATA;
            } SecFwRecoveryIf;
            struct {
                logic EXTCAP_HEADER;
                logic STBY_CR_CONTROL;
                logic STBY_CR_DEVICE_ADDR;
                logic STBY_CR_CAPABILITIES;
                logic STBY_CR_VIRTUAL_DEVICE_CHAR;
                logic STBY_CR_STATUS;
                logic STBY_CR_DEVICE_CHAR;
                logic STBY_CR_DEVICE_PID_LO;
                logic STBY_CR_INTR_STATUS;
                logic STBY_CR_VIRTUAL_DEVICE_PID_LO;
                logic STBY_CR_INTR_SIGNAL_ENABLE;
                logic STBY_CR_INTR_FORCE;
                logic STBY_CR_CCC_CONFIG_GETCAPS;
                logic STBY_CR_CCC_CONFIG_RSTACT_PARAMS;
                logic STBY_CR_VIRT_DEVICE_ADDR;
                logic __rsvd_3;
            } StdbyCtrlMode;
            struct {
                logic EXTCAP_HEADER;
                logic CONTROL;
                logic STATUS;
                logic RESET_CONTROL;
                logic INTERRUPT_STATUS;
                logic INTERRUPT_ENABLE;
                logic INTERRUPT_FORCE;
                logic RX_DESC_QUEUE_PORT;
                logic RX_DATA_PORT;
                logic TX_DESC_QUEUE_PORT;
                logic TX_DATA_PORT;
                logic IBI_PORT;
                logic QUEUE_SIZE;
                logic IBI_QUEUE_SIZE;
                logic QUEUE_THLD_CTRL;
                logic DATA_BUFFER_THLD_CTRL;
            } TTI;
            struct {
                logic EXTCAP_HEADER;
                logic SOC_MGMT_CONTROL;
                logic SOC_MGMT_STATUS;
                logic REC_INTF_CFG;
                logic REC_INTF_REG_W1C_ACCESS;
                logic SOC_MGMT_RSVD_2;
                logic SOC_MGMT_RSVD_3;
                logic SOC_PAD_CONF;
                logic SOC_PAD_ATTR;
                logic SOC_MGMT_FEATURE_2;
                logic SOC_MGMT_FEATURE_3;
                logic T_R_REG;
                logic T_F_REG;
                logic T_SU_DAT_REG;
                logic T_HD_DAT_REG;
                logic T_HIGH_REG;
                logic T_LOW_REG;
                logic T_HD_STA_REG;
                logic T_SU_STA_REG;
                logic T_SU_STO_REG;
                logic T_FREE_REG;
                logic T_AVAL_REG;
                logic T_IDLE_REG;
            } SoCMgmtIf;
            struct {
                logic EXTCAP_HEADER;
                logic CONTROLLER_CONFIG;
            } CtrlCfg;
            logic TERMINATION_EXTCAP_HEADER;
        } I3C_EC;
    } decoded_reg_strb_t;
    decoded_reg_strb_t decoded_reg_strb;
    logic decoded_strb_is_external;

    logic decoded_req;
    logic decoded_req_is_wr;
    logic [31:0] decoded_wr_data;
    logic [31:0] decoded_wr_biten;

    always_comb begin
        automatic logic is_external;
        is_external = '0;
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h100);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_0 = cpuif_req_masked & (cpuif_addr == 10'h104);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_1 = cpuif_req_masked & (cpuif_addr == 10'h108);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_2 = cpuif_req_masked & (cpuif_addr == 10'h10c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 = cpuif_req_masked & (cpuif_addr == 10'h110);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 = cpuif_req_masked & (cpuif_addr == 10'h114);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1 = cpuif_req_masked & (cpuif_addr == 10'h118);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2 = cpuif_req_masked & (cpuif_addr == 10'h11c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3 = cpuif_req_masked & (cpuif_addr == 10'h120);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4 = cpuif_req_masked & (cpuif_addr == 10'h124);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5 = cpuif_req_masked & (cpuif_addr == 10'h128);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_RESERVED = cpuif_req_masked & (cpuif_addr == 10'h12c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 = cpuif_req_masked & (cpuif_addr == 10'h130);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 = cpuif_req_masked & (cpuif_addr == 10'h134);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET = cpuif_req_masked & (cpuif_addr == 10'h138);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL = cpuif_req_masked & (cpuif_addr == 10'h13c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS = cpuif_req_masked & (cpuif_addr == 10'h140);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS = cpuif_req_masked & (cpuif_addr == 10'h144);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 = cpuif_req_masked & (cpuif_addr == 10'h148);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 = cpuif_req_masked & (cpuif_addr == 10'h14c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 = cpuif_req_masked & (cpuif_addr == 10'h150);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1 = cpuif_req_masked & (cpuif_addr == 10'h154);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2 = cpuif_req_masked & (cpuif_addr == 10'h158);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3 = cpuif_req_masked & (cpuif_addr == 10'h15c);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4 = cpuif_req_masked & (cpuif_addr == 10'h160);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED = cpuif_req_masked & (cpuif_addr == 10'h164);
        decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA = cpuif_req_masked & (cpuif_addr == 10'h168);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h168) & !cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h180);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL = cpuif_req_masked & (cpuif_addr == 10'h184);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR = cpuif_req_masked & (cpuif_addr == 10'h188);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES = cpuif_req_masked & (cpuif_addr == 10'h18c);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR = cpuif_req_masked & (cpuif_addr == 10'h190);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS = cpuif_req_masked & (cpuif_addr == 10'h194);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR = cpuif_req_masked & (cpuif_addr == 10'h198);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO = cpuif_req_masked & (cpuif_addr == 10'h19c);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS = cpuif_req_masked & (cpuif_addr == 10'h1a0);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO = cpuif_req_masked & (cpuif_addr == 10'h1a4);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE = cpuif_req_masked & (cpuif_addr == 10'h1a8);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE = cpuif_req_masked & (cpuif_addr == 10'h1ac);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS = cpuif_req_masked & (cpuif_addr == 10'h1b0);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS = cpuif_req_masked & (cpuif_addr == 10'h1b4);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR = cpuif_req_masked & (cpuif_addr == 10'h1b8);
        decoded_reg_strb.I3C_EC.StdbyCtrlMode.__rsvd_3 = cpuif_req_masked & (cpuif_addr == 10'h1bc);
        decoded_reg_strb.I3C_EC.TTI.EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h1c0);
        decoded_reg_strb.I3C_EC.TTI.CONTROL = cpuif_req_masked & (cpuif_addr == 10'h1c4);
        decoded_reg_strb.I3C_EC.TTI.STATUS = cpuif_req_masked & (cpuif_addr == 10'h1c8);
        decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL = cpuif_req_masked & (cpuif_addr == 10'h1cc);
        decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS = cpuif_req_masked & (cpuif_addr == 10'h1d0);
        decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE = cpuif_req_masked & (cpuif_addr == 10'h1d4);
        decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE = cpuif_req_masked & (cpuif_addr == 10'h1d8);
        decoded_reg_strb.I3C_EC.TTI.RX_DESC_QUEUE_PORT = cpuif_req_masked & (cpuif_addr == 10'h1dc);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h1dc) & !cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.TTI.RX_DATA_PORT = cpuif_req_masked & (cpuif_addr == 10'h1e0);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h1e0) & !cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.TTI.TX_DESC_QUEUE_PORT = cpuif_req_masked & (cpuif_addr == 10'h1e4);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h1e4) & cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.TTI.TX_DATA_PORT = cpuif_req_masked & (cpuif_addr == 10'h1e8);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h1e8) & cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.TTI.IBI_PORT = cpuif_req_masked & (cpuif_addr == 10'h1ec);
        is_external |= cpuif_req_masked & (cpuif_addr == 10'h1ec) & cpuif_req_is_wr;
        decoded_reg_strb.I3C_EC.TTI.QUEUE_SIZE = cpuif_req_masked & (cpuif_addr == 10'h1f0);
        decoded_reg_strb.I3C_EC.TTI.IBI_QUEUE_SIZE = cpuif_req_masked & (cpuif_addr == 10'h1f4);
        decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL = cpuif_req_masked & (cpuif_addr == 10'h1f8);
        decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL = cpuif_req_masked & (cpuif_addr == 10'h1fc);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h200);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL = cpuif_req_masked & (cpuif_addr == 10'h204);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS = cpuif_req_masked & (cpuif_addr == 10'h208);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_CFG = cpuif_req_masked & (cpuif_addr == 10'h20c);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS = cpuif_req_masked & (cpuif_addr == 10'h210);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2 = cpuif_req_masked & (cpuif_addr == 10'h214);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3 = cpuif_req_masked & (cpuif_addr == 10'h218);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF = cpuif_req_masked & (cpuif_addr == 10'h21c);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR = cpuif_req_masked & (cpuif_addr == 10'h220);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2 = cpuif_req_masked & (cpuif_addr == 10'h224);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3 = cpuif_req_masked & (cpuif_addr == 10'h228);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_R_REG = cpuif_req_masked & (cpuif_addr == 10'h22c);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_F_REG = cpuif_req_masked & (cpuif_addr == 10'h230);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_DAT_REG = cpuif_req_masked & (cpuif_addr == 10'h234);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_DAT_REG = cpuif_req_masked & (cpuif_addr == 10'h238);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HIGH_REG = cpuif_req_masked & (cpuif_addr == 10'h23c);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_LOW_REG = cpuif_req_masked & (cpuif_addr == 10'h240);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_STA_REG = cpuif_req_masked & (cpuif_addr == 10'h244);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STA_REG = cpuif_req_masked & (cpuif_addr == 10'h248);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STO_REG = cpuif_req_masked & (cpuif_addr == 10'h24c);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_FREE_REG = cpuif_req_masked & (cpuif_addr == 10'h250);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_AVAL_REG = cpuif_req_masked & (cpuif_addr == 10'h254);
        decoded_reg_strb.I3C_EC.SoCMgmtIf.T_IDLE_REG = cpuif_req_masked & (cpuif_addr == 10'h258);
        decoded_reg_strb.I3C_EC.CtrlCfg.EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h260);
        decoded_reg_strb.I3C_EC.CtrlCfg.CONTROLLER_CONFIG = cpuif_req_masked & (cpuif_addr == 10'h264);
        decoded_reg_strb.I3C_EC.TERMINATION_EXTCAP_HEADER = cpuif_req_masked & (cpuif_addr == 10'h268);
        decoded_strb_is_external = is_external;
        external_req = is_external;
    end

    // Pass down signals to next stage
    assign decoded_req = cpuif_req_masked;
    assign decoded_req_is_wr = cpuif_req_is_wr;
    assign decoded_wr_data = cpuif_wr_data;
    assign decoded_wr_biten = cpuif_wr_biten;

    //--------------------------------------------------------------------------
    // Field logic
    //--------------------------------------------------------------------------
    typedef struct {
        struct {
            struct {
                struct {
                    struct {
                        logic [15:0] next;
                        logic load_next;
                    } REC_PROT_VERSION;
                    struct {
                        logic [15:0] next;
                        logic load_next;
                    } AGENT_CAPS;
                } PROT_CAP_2;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } NUM_OF_CMS_REGIONS;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } MAX_RESP_TIME;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } HEARTBEAT_PERIOD;
                } PROT_CAP_3;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DESC_TYPE;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } VENDOR_SPECIFIC_STR_LENGTH;
                    struct {
                        logic [15:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_0;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_1;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_2;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_3;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_4;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } DEVICE_ID_5;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DEV_STATUS;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } PROT_ERROR;
                    struct {
                        logic [15:0] next;
                        logic load_next;
                    } REC_REASON_CODE;
                } DEVICE_STATUS_0;
                struct {
                    struct {
                        logic [15:0] next;
                        logic load_next;
                    } HEARTBEAT;
                    struct {
                        logic [8:0] next;
                        logic load_next;
                    } VENDOR_STATUS_LENGTH;
                    struct {
                        logic [6:0] next;
                        logic load_next;
                    } VENDOR_STATUS;
                } DEVICE_STATUS_1;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RESET_CTRL;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } FORCED_RECOVERY;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } IF_CTRL;
                } DEVICE_RESET;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } CMS;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } REC_IMG_SEL;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } ACTIVATE_REC_IMG;
                } RECOVERY_CTRL;
                struct {
                    struct {
                        logic [3:0] next;
                        logic load_next;
                    } DEV_REC_STATUS;
                    struct {
                        logic [3:0] next;
                        logic load_next;
                    } REC_IMG_INDEX;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } VENDOR_SPECIFIC_STATUS;
                } RECOVERY_STATUS;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } TEMP_CRITICAL;
                    struct {
                        logic next;
                        logic load_next;
                    } SOFT_ERR;
                    struct {
                        logic next;
                        logic load_next;
                    } FATAL_ERR;
                    struct {
                        logic [4:0] next;
                        logic load_next;
                    } RESERVED_7_3;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } VENDOR_HW_STATUS;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } CTEMP;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } VENDOR_HW_STATUS_LEN;
                } HW_STATUS;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } CMS;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RESET;
                } INDIRECT_FIFO_CTRL_0;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } IMAGE_SIZE;
                } INDIRECT_FIFO_CTRL_1;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } EMPTY;
                    struct {
                        logic next;
                        logic load_next;
                    } FULL;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } REGION_TYPE;
                } INDIRECT_FIFO_STATUS_0;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } WRITE_INDEX;
                } INDIRECT_FIFO_STATUS_1;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } READ_INDEX;
                } INDIRECT_FIFO_STATUS_2;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } FIFO_SIZE;
                } INDIRECT_FIFO_STATUS_3;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } DATA;
                } INDIRECT_FIFO_RESERVED;
            } SecFwRecoveryIf;
            struct {
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } PENDING_RX_NACK;
                    struct {
                        logic next;
                        logic load_next;
                    } HANDOFF_DELAY_NACK;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_FSM_OP_SELECT;
                    struct {
                        logic next;
                        logic load_next;
                    } PRIME_ACCEPT_GETACCCR;
                    struct {
                        logic next;
                        logic load_next;
                    } HANDOFF_DEEP_SLEEP;
                    struct {
                        logic next;
                        logic load_next;
                    } CR_REQUEST_SEND;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } BAST_CCC_IBI_RING;
                    struct {
                        logic next;
                        logic load_next;
                    } TARGET_XACT_ENABLE;
                    struct {
                        logic next;
                        logic load_next;
                    } DAA_SETAASA_ENABLE;
                    struct {
                        logic next;
                        logic load_next;
                    } DAA_SETDASA_ENABLE;
                    struct {
                        logic next;
                        logic load_next;
                    } DAA_ENTDAA_ENABLE;
                    struct {
                        logic next;
                        logic load_next;
                    } RSTACT_DEFBYTE_02;
                    struct {
                        logic [1:0] next;
                        logic load_next;
                    } STBY_CR_ENABLE_INIT;
                } STBY_CR_CONTROL;
                struct {
                    struct {
                        logic [6:0] next;
                        logic load_next;
                    } STATIC_ADDR;
                    struct {
                        logic next;
                        logic load_next;
                    } STATIC_ADDR_VALID;
                    struct {
                        logic [6:0] next;
                        logic load_next;
                    } DYNAMIC_ADDR;
                    struct {
                        logic next;
                        logic load_next;
                    } DYNAMIC_ADDR_VALID;
                } STBY_CR_DEVICE_ADDR;
                struct {
                    struct {
                        logic [14:0] next;
                        logic load_next;
                    } PID_HI;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DCR;
                    struct {
                        logic [4:0] next;
                        logic load_next;
                    } BCR_VAR;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } BCR_FIXED;
                } STBY_CR_VIRTUAL_DEVICE_CHAR;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } AC_CURRENT_OWN;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } SIMPLE_CRR_STATUS;
                    struct {
                        logic next;
                        logic load_next;
                    } HJ_REQ_STATUS;
                } STBY_CR_STATUS;
                struct {
                    struct {
                        logic [14:0] next;
                        logic load_next;
                    } PID_HI;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DCR;
                    struct {
                        logic [4:0] next;
                        logic load_next;
                    } BCR_VAR;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } BCR_FIXED;
                } STBY_CR_DEVICE_CHAR;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PID_LO;
                } STBY_CR_DEVICE_PID_LO;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_OK_REMAIN_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_OK_PRIMED_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_ERR_FAIL_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_ERR_M3_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } CRR_RESPONSE_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_DYN_ADDR_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_NACKED_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_OK_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_ERR_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_OP_RSTACT_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_PARAM_MODIFIED_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_UNHANDLED_NACK_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_FATAL_RSTDAA_ERR_STAT;
                } STBY_CR_INTR_STATUS;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PID_LO;
                } STBY_CR_VIRTUAL_DEVICE_PID_LO;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_OK_REMAIN_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_OK_PRIMED_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_ERR_FAIL_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } ACR_HANDOFF_ERR_M3_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } CRR_RESPONSE_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_DYN_ADDR_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_NACKED_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_OK_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_ERR_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_OP_RSTACT_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_PARAM_MODIFIED_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_UNHANDLED_NACK_SIGNAL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_FATAL_RSTDAA_ERR_SIGNAL_EN;
                } STBY_CR_INTR_SIGNAL_ENABLE;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } CRR_RESPONSE_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_DYN_ADDR_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_NACKED_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_OK_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_ACCEPT_ERR_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } STBY_CR_OP_RSTACT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_PARAM_MODIFIED_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_UNHANDLED_NACK_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } CCC_FATAL_RSTDAA_ERR_FORCE;
                } STBY_CR_INTR_FORCE;
                struct {
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } F2_CRCAP1_BUS_CONFIG;
                    struct {
                        logic [3:0] next;
                        logic load_next;
                    } F2_CRCAP2_DEV_INTERACT;
                } STBY_CR_CCC_CONFIG_GETCAPS;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RST_ACTION;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RESET_TIME_PERIPHERAL;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RESET_TIME_TARGET;
                    struct {
                        logic next;
                        logic load_next;
                    } RESET_DYNAMIC_ADDR;
                } STBY_CR_CCC_CONFIG_RSTACT_PARAMS;
                struct {
                    struct {
                        logic [6:0] next;
                        logic load_next;
                    } VIRT_STATIC_ADDR;
                    struct {
                        logic next;
                        logic load_next;
                    } VIRT_STATIC_ADDR_VALID;
                    struct {
                        logic [6:0] next;
                        logic load_next;
                    } VIRT_DYNAMIC_ADDR;
                    struct {
                        logic next;
                        logic load_next;
                    } VIRT_DYNAMIC_ADDR_VALID;
                } STBY_CR_VIRT_DEVICE_ADDR;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } __rsvd;
                } __rsvd_3;
            } StdbyCtrlMode;
            struct {
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } HJ_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } CRR_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_EN;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } IBI_RETRY_NUM;
                } CONTROL;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } PROTOCOL_ERROR;
                    struct {
                        logic [1:0] next;
                        logic load_next;
                    } LAST_IBI_STATUS;
                } STATUS;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } SOFT_RST;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_RST;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_RST;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DATA_RST;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DATA_RST;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_QUEUE_RST;
                } RESET_CONTROL;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_TIMEOUT;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_TIMEOUT;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DATA_THLD_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DATA_THLD_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_THLD_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_THLD_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_THLD_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_DONE;
                    struct {
                        logic [3:0] next;
                        logic load_next;
                    } PENDING_INTERRUPT;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ABORT_STAT;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_COMPLETE;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ERR_STAT;
                } INTERRUPT_STATUS;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_TIMEOUT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_TIMEOUT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DATA_THLD_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DATA_THLD_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_THLD_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_THLD_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_THLD_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_DONE_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ABORT_STAT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_COMPLETE_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ERR_STAT_EN;
                } INTERRUPT_ENABLE;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_STAT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_STAT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_TIMEOUT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_TIMEOUT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DATA_THLD_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DATA_THLD_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_THLD_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } RX_DESC_THLD_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_THLD_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } IBI_DONE_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ABORT_STAT_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TX_DESC_COMPLETE_FORCE;
                    struct {
                        logic next;
                        logic load_next;
                    } TRANSFER_ERR_STAT_FORCE;
                } INTERRUPT_FORCE;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } TX_DESC_THLD;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RX_DESC_THLD;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } IBI_THLD;
                } QUEUE_THLD_CTRL;
                struct {
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } TX_DATA_THLD;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } RX_DATA_THLD;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } TX_START_THLD;
                    struct {
                        logic [2:0] next;
                        logic load_next;
                    } RX_START_THLD;
                } DATA_BUFFER_THLD_CTRL;
            } TTI;
            struct {
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_CONTROL;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_STATUS;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } REC_INTF_BYPASS;
                    struct {
                        logic next;
                        logic load_next;
                    } REC_PAYLOAD_DONE;
                } REC_INTF_CFG;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DEVICE_RESET_CTRL;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } RECOVERY_CTRL_ACTIVATE_REC_IMG;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } INDIRECT_FIFO_CTRL_RESET;
                } REC_INTF_REG_W1C_ACCESS;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_RSVD_2;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_RSVD_3;
                struct {
                    struct {
                        logic next;
                        logic load_next;
                    } INPUT_ENABLE;
                    struct {
                        logic next;
                        logic load_next;
                    } SCHMITT_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } KEEPER_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } PULL_DIR;
                    struct {
                        logic next;
                        logic load_next;
                    } PULL_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } IO_INVERSION;
                    struct {
                        logic next;
                        logic load_next;
                    } OD_EN;
                    struct {
                        logic next;
                        logic load_next;
                    } VIRTUAL_OD_EN;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } PAD_TYPE;
                } SOC_PAD_CONF;
                struct {
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DRIVE_SLEW_RATE;
                    struct {
                        logic [7:0] next;
                        logic load_next;
                    } DRIVE_STRENGTH;
                } SOC_PAD_ATTR;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_FEATURE_2;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } PLACEHOLDER;
                } SOC_MGMT_FEATURE_3;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_R;
                } T_R_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_F;
                } T_F_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_SU_DAT;
                } T_SU_DAT_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_HD_DAT;
                } T_HD_DAT_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_HIGH;
                } T_HIGH_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_LOW;
                } T_LOW_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_HD_STA;
                } T_HD_STA_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_SU_STA;
                } T_SU_STA_REG;
                struct {
                    struct {
                        logic [19:0] next;
                        logic load_next;
                    } T_SU_STO;
                } T_SU_STO_REG;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } T_FREE;
                } T_FREE_REG;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } T_AVAL;
                } T_AVAL_REG;
                struct {
                    struct {
                        logic [31:0] next;
                        logic load_next;
                    } T_IDLE;
                } T_IDLE_REG;
            } SoCMgmtIf;
            struct {
                struct {
                    struct {
                        logic [1:0] next;
                        logic load_next;
                    } OPERATION_MODE;
                } CONTROLLER_CONFIG;
            } CtrlCfg;
        } I3C_EC;
    } field_combo_t;
    field_combo_t field_combo;

    typedef struct {
        struct {
            struct {
                struct {
                    struct {
                        logic [15:0] value;
                    } REC_PROT_VERSION;
                    struct {
                        logic [15:0] value;
                    } AGENT_CAPS;
                } PROT_CAP_2;
                struct {
                    struct {
                        logic [7:0] value;
                    } NUM_OF_CMS_REGIONS;
                    struct {
                        logic [7:0] value;
                    } MAX_RESP_TIME;
                    struct {
                        logic [7:0] value;
                    } HEARTBEAT_PERIOD;
                } PROT_CAP_3;
                struct {
                    struct {
                        logic [7:0] value;
                    } DESC_TYPE;
                    struct {
                        logic [7:0] value;
                    } VENDOR_SPECIFIC_STR_LENGTH;
                    struct {
                        logic [15:0] value;
                    } DATA;
                } DEVICE_ID_0;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } DEVICE_ID_1;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } DEVICE_ID_2;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } DEVICE_ID_3;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } DEVICE_ID_4;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } DEVICE_ID_5;
                struct {
                    struct {
                        logic [7:0] value;
                    } DEV_STATUS;
                    struct {
                        logic [7:0] value;
                    } PROT_ERROR;
                    struct {
                        logic [15:0] value;
                    } REC_REASON_CODE;
                } DEVICE_STATUS_0;
                struct {
                    struct {
                        logic [15:0] value;
                    } HEARTBEAT;
                    struct {
                        logic [8:0] value;
                    } VENDOR_STATUS_LENGTH;
                    struct {
                        logic [6:0] value;
                    } VENDOR_STATUS;
                } DEVICE_STATUS_1;
                struct {
                    struct {
                        logic [7:0] value;
                    } RESET_CTRL;
                    struct {
                        logic [7:0] value;
                    } FORCED_RECOVERY;
                    struct {
                        logic [7:0] value;
                    } IF_CTRL;
                } DEVICE_RESET;
                struct {
                    struct {
                        logic [7:0] value;
                    } CMS;
                    struct {
                        logic [7:0] value;
                    } REC_IMG_SEL;
                    struct {
                        logic [7:0] value;
                    } ACTIVATE_REC_IMG;
                } RECOVERY_CTRL;
                struct {
                    struct {
                        logic [3:0] value;
                    } DEV_REC_STATUS;
                    struct {
                        logic [3:0] value;
                    } REC_IMG_INDEX;
                    struct {
                        logic [7:0] value;
                    } VENDOR_SPECIFIC_STATUS;
                } RECOVERY_STATUS;
                struct {
                    struct {
                        logic value;
                    } TEMP_CRITICAL;
                    struct {
                        logic value;
                    } SOFT_ERR;
                    struct {
                        logic value;
                    } FATAL_ERR;
                    struct {
                        logic [4:0] value;
                    } RESERVED_7_3;
                    struct {
                        logic [7:0] value;
                    } VENDOR_HW_STATUS;
                    struct {
                        logic [7:0] value;
                    } CTEMP;
                    struct {
                        logic [7:0] value;
                    } VENDOR_HW_STATUS_LEN;
                } HW_STATUS;
                struct {
                    struct {
                        logic [7:0] value;
                    } CMS;
                    struct {
                        logic [7:0] value;
                    } RESET;
                } INDIRECT_FIFO_CTRL_0;
                struct {
                    struct {
                        logic [31:0] value;
                    } IMAGE_SIZE;
                } INDIRECT_FIFO_CTRL_1;
                struct {
                    struct {
                        logic value;
                    } EMPTY;
                    struct {
                        logic value;
                    } FULL;
                    struct {
                        logic [2:0] value;
                    } REGION_TYPE;
                } INDIRECT_FIFO_STATUS_0;
                struct {
                    struct {
                        logic [31:0] value;
                    } WRITE_INDEX;
                } INDIRECT_FIFO_STATUS_1;
                struct {
                    struct {
                        logic [31:0] value;
                    } READ_INDEX;
                } INDIRECT_FIFO_STATUS_2;
                struct {
                    struct {
                        logic [31:0] value;
                    } FIFO_SIZE;
                } INDIRECT_FIFO_STATUS_3;
                struct {
                    struct {
                        logic [31:0] value;
                    } DATA;
                } INDIRECT_FIFO_RESERVED;
            } SecFwRecoveryIf;
            struct {
                struct {
                    struct {
                        logic value;
                    } PENDING_RX_NACK;
                    struct {
                        logic value;
                    } HANDOFF_DELAY_NACK;
                    struct {
                        logic value;
                    } ACR_FSM_OP_SELECT;
                    struct {
                        logic value;
                    } PRIME_ACCEPT_GETACCCR;
                    struct {
                        logic value;
                    } HANDOFF_DEEP_SLEEP;
                    struct {
                        logic value;
                    } CR_REQUEST_SEND;
                    struct {
                        logic [2:0] value;
                    } BAST_CCC_IBI_RING;
                    struct {
                        logic value;
                    } TARGET_XACT_ENABLE;
                    struct {
                        logic value;
                    } DAA_SETAASA_ENABLE;
                    struct {
                        logic value;
                    } DAA_SETDASA_ENABLE;
                    struct {
                        logic value;
                    } DAA_ENTDAA_ENABLE;
                    struct {
                        logic value;
                    } RSTACT_DEFBYTE_02;
                    struct {
                        logic [1:0] value;
                    } STBY_CR_ENABLE_INIT;
                } STBY_CR_CONTROL;
                struct {
                    struct {
                        logic [6:0] value;
                    } STATIC_ADDR;
                    struct {
                        logic value;
                    } STATIC_ADDR_VALID;
                    struct {
                        logic [6:0] value;
                    } DYNAMIC_ADDR;
                    struct {
                        logic value;
                    } DYNAMIC_ADDR_VALID;
                } STBY_CR_DEVICE_ADDR;
                struct {
                    struct {
                        logic [14:0] value;
                    } PID_HI;
                    struct {
                        logic [7:0] value;
                    } DCR;
                    struct {
                        logic [4:0] value;
                    } BCR_VAR;
                    struct {
                        logic [2:0] value;
                    } BCR_FIXED;
                } STBY_CR_VIRTUAL_DEVICE_CHAR;
                struct {
                    struct {
                        logic value;
                    } AC_CURRENT_OWN;
                    struct {
                        logic [2:0] value;
                    } SIMPLE_CRR_STATUS;
                    struct {
                        logic value;
                    } HJ_REQ_STATUS;
                } STBY_CR_STATUS;
                struct {
                    struct {
                        logic [14:0] value;
                    } PID_HI;
                    struct {
                        logic [7:0] value;
                    } DCR;
                    struct {
                        logic [4:0] value;
                    } BCR_VAR;
                    struct {
                        logic [2:0] value;
                    } BCR_FIXED;
                } STBY_CR_DEVICE_CHAR;
                struct {
                    struct {
                        logic [31:0] value;
                    } PID_LO;
                } STBY_CR_DEVICE_PID_LO;
                struct {
                    struct {
                        logic value;
                    } ACR_HANDOFF_OK_REMAIN_STAT;
                    struct {
                        logic value;
                    } ACR_HANDOFF_OK_PRIMED_STAT;
                    struct {
                        logic value;
                    } ACR_HANDOFF_ERR_FAIL_STAT;
                    struct {
                        logic value;
                    } ACR_HANDOFF_ERR_M3_STAT;
                    struct {
                        logic value;
                    } CRR_RESPONSE_STAT;
                    struct {
                        logic value;
                    } STBY_CR_DYN_ADDR_STAT;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_NACKED_STAT;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_OK_STAT;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_ERR_STAT;
                    struct {
                        logic value;
                    } STBY_CR_OP_RSTACT_STAT;
                    struct {
                        logic value;
                    } CCC_PARAM_MODIFIED_STAT;
                    struct {
                        logic value;
                    } CCC_UNHANDLED_NACK_STAT;
                    struct {
                        logic value;
                    } CCC_FATAL_RSTDAA_ERR_STAT;
                } STBY_CR_INTR_STATUS;
                struct {
                    struct {
                        logic [31:0] value;
                    } PID_LO;
                } STBY_CR_VIRTUAL_DEVICE_PID_LO;
                struct {
                    struct {
                        logic value;
                    } ACR_HANDOFF_OK_REMAIN_SIGNAL_EN;
                    struct {
                        logic value;
                    } ACR_HANDOFF_OK_PRIMED_SIGNAL_EN;
                    struct {
                        logic value;
                    } ACR_HANDOFF_ERR_FAIL_SIGNAL_EN;
                    struct {
                        logic value;
                    } ACR_HANDOFF_ERR_M3_SIGNAL_EN;
                    struct {
                        logic value;
                    } CRR_RESPONSE_SIGNAL_EN;
                    struct {
                        logic value;
                    } STBY_CR_DYN_ADDR_SIGNAL_EN;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_NACKED_SIGNAL_EN;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_OK_SIGNAL_EN;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_ERR_SIGNAL_EN;
                    struct {
                        logic value;
                    } STBY_CR_OP_RSTACT_SIGNAL_EN;
                    struct {
                        logic value;
                    } CCC_PARAM_MODIFIED_SIGNAL_EN;
                    struct {
                        logic value;
                    } CCC_UNHANDLED_NACK_SIGNAL_EN;
                    struct {
                        logic value;
                    } CCC_FATAL_RSTDAA_ERR_SIGNAL_EN;
                } STBY_CR_INTR_SIGNAL_ENABLE;
                struct {
                    struct {
                        logic value;
                    } CRR_RESPONSE_FORCE;
                    struct {
                        logic value;
                    } STBY_CR_DYN_ADDR_FORCE;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_NACKED_FORCE;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_OK_FORCE;
                    struct {
                        logic value;
                    } STBY_CR_ACCEPT_ERR_FORCE;
                    struct {
                        logic value;
                    } STBY_CR_OP_RSTACT_FORCE;
                    struct {
                        logic value;
                    } CCC_PARAM_MODIFIED_FORCE;
                    struct {
                        logic value;
                    } CCC_UNHANDLED_NACK_FORCE;
                    struct {
                        logic value;
                    } CCC_FATAL_RSTDAA_ERR_FORCE;
                } STBY_CR_INTR_FORCE;
                struct {
                    struct {
                        logic [2:0] value;
                    } F2_CRCAP1_BUS_CONFIG;
                    struct {
                        logic [3:0] value;
                    } F2_CRCAP2_DEV_INTERACT;
                } STBY_CR_CCC_CONFIG_GETCAPS;
                struct {
                    struct {
                        logic [7:0] value;
                    } RST_ACTION;
                    struct {
                        logic [7:0] value;
                    } RESET_TIME_PERIPHERAL;
                    struct {
                        logic [7:0] value;
                    } RESET_TIME_TARGET;
                    struct {
                        logic value;
                    } RESET_DYNAMIC_ADDR;
                } STBY_CR_CCC_CONFIG_RSTACT_PARAMS;
                struct {
                    struct {
                        logic [6:0] value;
                    } VIRT_STATIC_ADDR;
                    struct {
                        logic value;
                    } VIRT_STATIC_ADDR_VALID;
                    struct {
                        logic [6:0] value;
                    } VIRT_DYNAMIC_ADDR;
                    struct {
                        logic value;
                    } VIRT_DYNAMIC_ADDR_VALID;
                } STBY_CR_VIRT_DEVICE_ADDR;
                struct {
                    struct {
                        logic [31:0] value;
                    } __rsvd;
                } __rsvd_3;
            } StdbyCtrlMode;
            struct {
                struct {
                    struct {
                        logic value;
                    } HJ_EN;
                    struct {
                        logic value;
                    } CRR_EN;
                    struct {
                        logic value;
                    } IBI_EN;
                    struct {
                        logic [2:0] value;
                    } IBI_RETRY_NUM;
                } CONTROL;
                struct {
                    struct {
                        logic value;
                    } PROTOCOL_ERROR;
                    struct {
                        logic [1:0] value;
                    } LAST_IBI_STATUS;
                } STATUS;
                struct {
                    struct {
                        logic value;
                    } SOFT_RST;
                    struct {
                        logic value;
                    } TX_DESC_RST;
                    struct {
                        logic value;
                    } RX_DESC_RST;
                    struct {
                        logic value;
                    } TX_DATA_RST;
                    struct {
                        logic value;
                    } RX_DATA_RST;
                    struct {
                        logic value;
                    } IBI_QUEUE_RST;
                } RESET_CONTROL;
                struct {
                    struct {
                        logic value;
                    } RX_DESC_STAT;
                    struct {
                        logic value;
                    } TX_DESC_STAT;
                    struct {
                        logic value;
                    } RX_DESC_TIMEOUT;
                    struct {
                        logic value;
                    } TX_DESC_TIMEOUT;
                    struct {
                        logic value;
                    } TX_DATA_THLD_STAT;
                    struct {
                        logic value;
                    } RX_DATA_THLD_STAT;
                    struct {
                        logic value;
                    } TX_DESC_THLD_STAT;
                    struct {
                        logic value;
                    } RX_DESC_THLD_STAT;
                    struct {
                        logic value;
                    } IBI_THLD_STAT;
                    struct {
                        logic value;
                    } IBI_DONE;
                    struct {
                        logic [3:0] value;
                    } PENDING_INTERRUPT;
                    struct {
                        logic value;
                    } TRANSFER_ABORT_STAT;
                    struct {
                        logic value;
                    } TX_DESC_COMPLETE;
                    struct {
                        logic value;
                    } TRANSFER_ERR_STAT;
                } INTERRUPT_STATUS;
                struct {
                    struct {
                        logic value;
                    } RX_DESC_STAT_EN;
                    struct {
                        logic value;
                    } TX_DESC_STAT_EN;
                    struct {
                        logic value;
                    } RX_DESC_TIMEOUT_EN;
                    struct {
                        logic value;
                    } TX_DESC_TIMEOUT_EN;
                    struct {
                        logic value;
                    } TX_DATA_THLD_STAT_EN;
                    struct {
                        logic value;
                    } RX_DATA_THLD_STAT_EN;
                    struct {
                        logic value;
                    } TX_DESC_THLD_STAT_EN;
                    struct {
                        logic value;
                    } RX_DESC_THLD_STAT_EN;
                    struct {
                        logic value;
                    } IBI_THLD_STAT_EN;
                    struct {
                        logic value;
                    } IBI_DONE_EN;
                    struct {
                        logic value;
                    } TRANSFER_ABORT_STAT_EN;
                    struct {
                        logic value;
                    } TX_DESC_COMPLETE_EN;
                    struct {
                        logic value;
                    } TRANSFER_ERR_STAT_EN;
                } INTERRUPT_ENABLE;
                struct {
                    struct {
                        logic value;
                    } RX_DESC_STAT_FORCE;
                    struct {
                        logic value;
                    } TX_DESC_STAT_FORCE;
                    struct {
                        logic value;
                    } RX_DESC_TIMEOUT_FORCE;
                    struct {
                        logic value;
                    } TX_DESC_TIMEOUT_FORCE;
                    struct {
                        logic value;
                    } TX_DATA_THLD_FORCE;
                    struct {
                        logic value;
                    } RX_DATA_THLD_FORCE;
                    struct {
                        logic value;
                    } TX_DESC_THLD_FORCE;
                    struct {
                        logic value;
                    } RX_DESC_THLD_FORCE;
                    struct {
                        logic value;
                    } IBI_THLD_FORCE;
                    struct {
                        logic value;
                    } IBI_DONE_FORCE;
                    struct {
                        logic value;
                    } TRANSFER_ABORT_STAT_FORCE;
                    struct {
                        logic value;
                    } TX_DESC_COMPLETE_FORCE;
                    struct {
                        logic value;
                    } TRANSFER_ERR_STAT_FORCE;
                } INTERRUPT_FORCE;
                struct {
                    struct {
                        logic [7:0] value;
                    } TX_DESC_THLD;
                    struct {
                        logic [7:0] value;
                    } RX_DESC_THLD;
                    struct {
                        logic [7:0] value;
                    } IBI_THLD;
                } QUEUE_THLD_CTRL;
                struct {
                    struct {
                        logic [2:0] value;
                    } TX_DATA_THLD;
                    struct {
                        logic [2:0] value;
                    } RX_DATA_THLD;
                    struct {
                        logic [2:0] value;
                    } TX_START_THLD;
                    struct {
                        logic [2:0] value;
                    } RX_START_THLD;
                } DATA_BUFFER_THLD_CTRL;
            } TTI;
            struct {
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_CONTROL;
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_STATUS;
                struct {
                    struct {
                        logic value;
                    } REC_INTF_BYPASS;
                    struct {
                        logic value;
                    } REC_PAYLOAD_DONE;
                } REC_INTF_CFG;
                struct {
                    struct {
                        logic [7:0] value;
                    } DEVICE_RESET_CTRL;
                    struct {
                        logic [7:0] value;
                    } RECOVERY_CTRL_ACTIVATE_REC_IMG;
                    struct {
                        logic [7:0] value;
                    } INDIRECT_FIFO_CTRL_RESET;
                } REC_INTF_REG_W1C_ACCESS;
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_RSVD_2;
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_RSVD_3;
                struct {
                    struct {
                        logic value;
                    } INPUT_ENABLE;
                    struct {
                        logic value;
                    } SCHMITT_EN;
                    struct {
                        logic value;
                    } KEEPER_EN;
                    struct {
                        logic value;
                    } PULL_DIR;
                    struct {
                        logic value;
                    } PULL_EN;
                    struct {
                        logic value;
                    } IO_INVERSION;
                    struct {
                        logic value;
                    } OD_EN;
                    struct {
                        logic value;
                    } VIRTUAL_OD_EN;
                    struct {
                        logic [7:0] value;
                    } PAD_TYPE;
                } SOC_PAD_CONF;
                struct {
                    struct {
                        logic [7:0] value;
                    } DRIVE_SLEW_RATE;
                    struct {
                        logic [7:0] value;
                    } DRIVE_STRENGTH;
                } SOC_PAD_ATTR;
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_FEATURE_2;
                struct {
                    struct {
                        logic [31:0] value;
                    } PLACEHOLDER;
                } SOC_MGMT_FEATURE_3;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_R;
                } T_R_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_F;
                } T_F_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_SU_DAT;
                } T_SU_DAT_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_HD_DAT;
                } T_HD_DAT_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_HIGH;
                } T_HIGH_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_LOW;
                } T_LOW_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_HD_STA;
                } T_HD_STA_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_SU_STA;
                } T_SU_STA_REG;
                struct {
                    struct {
                        logic [19:0] value;
                    } T_SU_STO;
                } T_SU_STO_REG;
                struct {
                    struct {
                        logic [31:0] value;
                    } T_FREE;
                } T_FREE_REG;
                struct {
                    struct {
                        logic [31:0] value;
                    } T_AVAL;
                } T_AVAL_REG;
                struct {
                    struct {
                        logic [31:0] value;
                    } T_IDLE;
                } T_IDLE_REG;
            } SoCMgmtIf;
            struct {
                struct {
                    struct {
                        logic [1:0] value;
                    } OPERATION_MODE;
                } CONTROLLER_CONFIG;
            } CtrlCfg;
        } I3C_EC;
    } field_storage_t;
    field_storage_t field_storage;

    assign hwif_out.I3C_EC.SecFwRecoveryIf.EXTCAP_HEADER.CAP_ID.value = 8'hc0;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.EXTCAP_HEADER.CAP_LENGTH.value = 16'h20;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_0.REC_MAGIC_STRING_0.value = 32'h2050434f;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_1.REC_MAGIC_STRING_1.value = 32'h56434552;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION
    always_comb begin
        automatic logic [15:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_2 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value <= 16'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value <= field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS
    always_comb begin
        automatic logic [15:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_2 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value <= 16'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value <= field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value <= field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value <= field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value <= field_combo.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value = field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA
    always_comb begin
        automatic logic [15:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value <= 16'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_ID_RESERVED.DATA.value = 32'h0;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && !decoded_req_is_wr) begin // SW clear on read
            next_c = '0;
            load_next_c = '1;
        end else if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE
    always_comb begin
        automatic logic [15:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value & ~decoded_wr_biten[31:16]) | (decoded_wr_data[31:16] & decoded_wr_biten[31:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value <= 16'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT
    always_comb begin
        automatic logic [15:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value & ~decoded_wr_biten[15:0]) | (decoded_wr_data[15:0] & decoded_wr_biten[15:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value <= 16'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH
    always_comb begin
        automatic logic [8:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value & ~decoded_wr_biten[24:16]) | (decoded_wr_data[24:16] & decoded_wr_biten[24:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value <= 9'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS
    always_comb begin
        automatic logic [6:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value & ~decoded_wr_biten[31:25]) | (decoded_wr_data[31:25] & decoded_wr_biten[31:25]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value <= 7'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value & ~(decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value <= field_combo.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value = field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.swmod = decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.swmod = decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value & ~(decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.swmod = decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS
    always_comb begin
        automatic logic [3:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value & ~decoded_wr_biten[3:0]) | (decoded_wr_data[3:0] & decoded_wr_biten[3:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value <= 4'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX
    always_comb begin
        automatic logic [3:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value & ~decoded_wr_biten[7:4]) | (decoded_wr_data[7:4] & decoded_wr_biten[7:4]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value <= 4'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value <= field_combo.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value = field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3
    always_comb begin
        automatic logic [4:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value & ~decoded_wr_biten[7:3]) | (decoded_wr_data[7:3] & decoded_wr_biten[7:3]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value <= 5'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value & ~decoded_wr_biten[31:24]) | (decoded_wr_data[31:24] & decoded_wr_biten[31:24]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value <= field_combo.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value = field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.next;
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value <= 3'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value <= 32'h40;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4.MAX_TRANSFER_SIZE.value = 32'h40;
    // Field: I3CCSR.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.next = next_c;
        field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.load_next) begin
                field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value <= field_combo.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value = field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value;

    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.req = !decoded_req_is_wr ? decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA : '0;
    assign hwif_out.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.req_is_wr = decoded_req_is_wr;
    assign hwif_out.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER.CAP_ID.value = 8'h12;
    assign hwif_out.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER.CAP_LENGTH.value = 16'h10;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write set
            next_c = '1;
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.next;
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.CR_REQUEST_SEND.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value & ~decoded_wr_biten[10:8]) | (decoded_wr_data[10:8] & decoded_wr_biten[10:8]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value <= 3'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value & ~decoded_wr_biten[14:14]) | (decoded_wr_data[14:14] & decoded_wr_biten[14:14]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value & ~decoded_wr_biten[15:15]) | (decoded_wr_data[15:15] & decoded_wr_biten[15:15]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value & ~decoded_wr_biten[20:20]) | (decoded_wr_data[20:20] & decoded_wr_biten[20:20]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT
    always_comb begin
        automatic logic [1:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value & ~decoded_wr_biten[31:30]) | (decoded_wr_data[31:30] & decoded_wr_biten[31:30]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value <= 2'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR
    always_comb begin
        automatic logic [6:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value & ~decoded_wr_biten[6:0]) | (decoded_wr_data[6:0] & decoded_wr_biten[6:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value <= 7'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value & ~decoded_wr_biten[15:15]) | (decoded_wr_data[15:15] & decoded_wr_biten[15:15]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR
    always_comb begin
        automatic logic [6:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value & ~decoded_wr_biten[22:16]) | (decoded_wr_data[22:16] & decoded_wr_biten[22:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value <= 7'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value;
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES.SIMPLE_CRR_SUPPORT.value = 1'h0;
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES.TARGET_XACT_SUPPORT.value = 1'h1;
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES.DAA_SETAASA_SUPPORT.value = 1'h1;
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES.DAA_SETDASA_SUPPORT.value = 1'h1;
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES.DAA_ENTDAA_SUPPORT.value = 1'h0;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI
    always_comb begin
        automatic logic [14:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value & ~decoded_wr_biten[15:1]) | (decoded_wr_data[15:1] & decoded_wr_biten[15:1]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value <= 15'h7fff;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value <= 8'hbd;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR
    always_comb begin
        automatic logic [4:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value & ~decoded_wr_biten[28:24]) | (decoded_wr_data[28:24] & decoded_wr_biten[28:24]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value <= 5'h6;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value & ~decoded_wr_biten[31:29]) | (decoded_wr_data[31:29] & decoded_wr_biten[31:29]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value & ~decoded_wr_biten[7:5]) | (decoded_wr_data[7:5] & decoded_wr_biten[7:5]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI
    always_comb begin
        automatic logic [14:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value & ~decoded_wr_biten[15:1]) | (decoded_wr_data[15:1] & decoded_wr_biten[15:1]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value <= 15'h7fff;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value <= 8'hbd;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR
    always_comb begin
        automatic logic [4:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value & ~decoded_wr_biten[28:24]) | (decoded_wr_data[28:24] & decoded_wr_biten[28:24]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value <= 5'h6;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value & ~decoded_wr_biten[31:29]) | (decoded_wr_data[31:29] & decoded_wr_biten[31:29]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value <= 32'h5a00a5;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value & ~decoded_wr_biten[14:14]) | (decoded_wr_data[14:14] & decoded_wr_biten[14:14]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value & ~decoded_wr_biten[16:16]) | (decoded_wr_data[16:16] & decoded_wr_biten[16:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value & ~decoded_wr_biten[17:17]) | (decoded_wr_data[17:17] & decoded_wr_biten[17:17]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value & ~decoded_wr_biten[18:18]) | (decoded_wr_data[18:18] & decoded_wr_biten[18:18]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value & ~decoded_wr_biten[19:19]) | (decoded_wr_data[19:19] & decoded_wr_biten[19:19]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value <= 32'h5a10a5;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value & ~decoded_wr_biten[14:14]) | (decoded_wr_data[14:14] & decoded_wr_biten[14:14]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value & ~decoded_wr_biten[16:16]) | (decoded_wr_data[16:16] & decoded_wr_biten[16:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value & ~decoded_wr_biten[17:17]) | (decoded_wr_data[17:17] & decoded_wr_biten[17:17]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value & ~decoded_wr_biten[18:18]) | (decoded_wr_data[18:18] & decoded_wr_biten[18:18]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value & ~decoded_wr_biten[19:19]) | (decoded_wr_data[19:19] & decoded_wr_biten[19:19]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value & ~decoded_wr_biten[14:14]) | (decoded_wr_data[14:14] & decoded_wr_biten[14:14]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.value & ~decoded_wr_biten[16:16]) | (decoded_wr_data[16:16] & decoded_wr_biten[16:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_OP_RSTACT_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value & ~decoded_wr_biten[17:17]) | (decoded_wr_data[17:17] & decoded_wr_biten[17:17]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value & ~decoded_wr_biten[18:18]) | (decoded_wr_data[18:18] & decoded_wr_biten[18:18]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value & ~decoded_wr_biten[19:19]) | (decoded_wr_data[19:19] & decoded_wr_biten[19:19]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value & ~decoded_wr_biten[2:0]) | (decoded_wr_data[2:0] & decoded_wr_biten[2:0]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT
    always_comb begin
        automatic logic [3:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value & ~decoded_wr_biten[11:8]) | (decoded_wr_data[11:8] & decoded_wr_biten[11:8]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR
    always_comb begin
        automatic logic [6:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value & ~decoded_wr_biten[6:0]) | (decoded_wr_data[6:0] & decoded_wr_biten[6:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value <= 7'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value & ~decoded_wr_biten[15:15]) | (decoded_wr_data[15:15] & decoded_wr_biten[15:15]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR
    always_comb begin
        automatic logic [6:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value & ~decoded_wr_biten[22:16]) | (decoded_wr_data[22:16] & decoded_wr_biten[22:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value <= 7'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.load_next) begin
                field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value <= field_combo.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.next;
            end
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value = field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value;
    // Field: I3CCSR.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.StdbyCtrlMode.__rsvd_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end else begin // HW Write
            next_c = hwif_in.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.next = next_c;
        field_combo.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.load_next = load_next_c;
    end
    always_ff @(posedge clk) begin
        if(field_combo.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.load_next) begin
            field_storage.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value <= field_combo.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.next;
        end
    end
    assign hwif_out.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value = field_storage.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value;
    assign hwif_out.I3C_EC.TTI.EXTCAP_HEADER.CAP_ID.value = 8'hc4;
    assign hwif_out.I3C_EC.TTI.EXTCAP_HEADER.CAP_LENGTH.value = 16'h10;
    // Field: I3CCSR.I3C_EC.TTI.CONTROL.HJ_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.CONTROL.HJ_EN.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.CONTROL.HJ_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.CONTROL.HJ_EN.next = next_c;
        field_combo.I3C_EC.TTI.CONTROL.HJ_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.CONTROL.HJ_EN.load_next) begin
                field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value <= field_combo.I3C_EC.TTI.CONTROL.HJ_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.CONTROL.HJ_EN.value = field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.CONTROL.CRR_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.CONTROL.CRR_EN.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.CONTROL.CRR_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.CONTROL.CRR_EN.next = next_c;
        field_combo.I3C_EC.TTI.CONTROL.CRR_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.CONTROL.CRR_EN.load_next) begin
                field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value <= field_combo.I3C_EC.TTI.CONTROL.CRR_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.CONTROL.CRR_EN.value = field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.CONTROL.IBI_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.CONTROL.IBI_EN.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.CONTROL.IBI_EN.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.CONTROL.IBI_EN.next = next_c;
        field_combo.I3C_EC.TTI.CONTROL.IBI_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.CONTROL.IBI_EN.load_next) begin
                field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value <= field_combo.I3C_EC.TTI.CONTROL.IBI_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.CONTROL.IBI_EN.value = field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value & ~decoded_wr_biten[15:13]) | (decoded_wr_data[15:13] & decoded_wr_biten[15:13]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.next = next_c;
        field_combo.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value <= 3'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.load_next) begin
                field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value <= field_combo.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value = field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value;
    // Field: I3CCSR.I3C_EC.TTI.STATUS.PROTOCOL_ERROR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value;
        load_next_c = '0;
        
        // HW Write
        next_c = hwif_in.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.next;
        load_next_c = '1;
        field_combo.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.next = next_c;
        field_combo.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.load_next) begin
                field_storage.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value <= field_combo.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value = field_storage.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value;
    // Field: I3CCSR.I3C_EC.TTI.STATUS.LAST_IBI_STATUS
    always_comb begin
        automatic logic [1:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.next = next_c;
        field_combo.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value <= 2'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.load_next) begin
                field_storage.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value <= field_combo.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value = field_storage.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value;
    assign hwif_out.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.swacc = decoded_reg_strb.I3C_EC.TTI.STATUS;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.SOFT_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.hwclr) begin // HW Clear
            next_c = '0;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.next = next_c;
        field_combo.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.load_next) begin
                field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value <= field_combo.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value = field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value & ~(decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value & ~(decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value & ~(decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value & ~(decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value & ~(decoded_wr_data[8:8] & decoded_wr_biten[8:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value & ~(decoded_wr_data[9:9] & decoded_wr_biten[9:9]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value & ~(decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value & ~(decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value & ~(decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value & ~(decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT
    always_comb begin
        automatic logic [3:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value & ~(decoded_wr_data[18:15] & decoded_wr_biten[18:15]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value <= 4'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value & ~(decoded_wr_data[25:25] & decoded_wr_biten[25:25]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value & ~(decoded_wr_data[26:26] & decoded_wr_biten[26:26]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && decoded_req_is_wr) begin // SW write 1 clear
            next_c = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value & ~(decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value <= field_combo.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value = field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value & ~decoded_wr_biten[25:25]) | (decoded_wr_data[25:25] & decoded_wr_biten[25:25]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value & ~decoded_wr_biten[26:26]) | (decoded_wr_data[26:26] & decoded_wr_biten[26:26]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value <= field_combo.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value = field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value & ~decoded_wr_biten[8:8]) | (decoded_wr_data[8:8] & decoded_wr_biten[8:8]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value & ~decoded_wr_biten[9:9]) | (decoded_wr_data[9:9] & decoded_wr_biten[9:9]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value & ~decoded_wr_biten[10:10]) | (decoded_wr_data[10:10] & decoded_wr_biten[10:10]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value & ~decoded_wr_biten[11:11]) | (decoded_wr_data[11:11] & decoded_wr_biten[11:11]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value & ~decoded_wr_biten[12:12]) | (decoded_wr_data[12:12] & decoded_wr_biten[12:12]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value & ~decoded_wr_biten[13:13]) | (decoded_wr_data[13:13] & decoded_wr_biten[13:13]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value & ~decoded_wr_biten[25:25]) | (decoded_wr_data[25:25] & decoded_wr_biten[25:25]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value & ~decoded_wr_biten[26:26]) | (decoded_wr_data[26:26] & decoded_wr_biten[26:26]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value;
    // Field: I3CCSR.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value & ~decoded_wr_biten[31:31]) | (decoded_wr_data[31:31] & decoded_wr_biten[31:31]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.next = next_c;
        field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.load_next) begin
                field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value <= field_combo.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value = field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value;

    assign hwif_out.I3C_EC.TTI.RX_DESC_QUEUE_PORT.req = !decoded_req_is_wr ? decoded_reg_strb.I3C_EC.TTI.RX_DESC_QUEUE_PORT : '0;
    assign hwif_out.I3C_EC.TTI.RX_DESC_QUEUE_PORT.req_is_wr = decoded_req_is_wr;

    assign hwif_out.I3C_EC.TTI.RX_DATA_PORT.req = !decoded_req_is_wr ? decoded_reg_strb.I3C_EC.TTI.RX_DATA_PORT : '0;
    assign hwif_out.I3C_EC.TTI.RX_DATA_PORT.req_is_wr = decoded_req_is_wr;

    assign hwif_out.I3C_EC.TTI.TX_DESC_QUEUE_PORT.req = decoded_req_is_wr ? decoded_reg_strb.I3C_EC.TTI.TX_DESC_QUEUE_PORT : '0;
    assign hwif_out.I3C_EC.TTI.TX_DESC_QUEUE_PORT.req_is_wr = decoded_req_is_wr;
    assign hwif_out.I3C_EC.TTI.TX_DESC_QUEUE_PORT.wr_data = decoded_wr_data;
    assign hwif_out.I3C_EC.TTI.TX_DESC_QUEUE_PORT.wr_biten = decoded_wr_biten;

    assign hwif_out.I3C_EC.TTI.TX_DATA_PORT.req = decoded_req_is_wr ? decoded_reg_strb.I3C_EC.TTI.TX_DATA_PORT : '0;
    assign hwif_out.I3C_EC.TTI.TX_DATA_PORT.req_is_wr = decoded_req_is_wr;
    assign hwif_out.I3C_EC.TTI.TX_DATA_PORT.wr_data = decoded_wr_data;
    assign hwif_out.I3C_EC.TTI.TX_DATA_PORT.wr_biten = decoded_wr_biten;

    assign hwif_out.I3C_EC.TTI.IBI_PORT.req = decoded_req_is_wr ? decoded_reg_strb.I3C_EC.TTI.IBI_PORT : '0;
    assign hwif_out.I3C_EC.TTI.IBI_PORT.req_is_wr = decoded_req_is_wr;
    assign hwif_out.I3C_EC.TTI.IBI_PORT.wr_data = decoded_wr_data;
    assign hwif_out.I3C_EC.TTI.IBI_PORT.wr_biten = decoded_wr_biten;
    assign hwif_out.I3C_EC.TTI.QUEUE_SIZE.RX_DESC_BUFFER_SIZE.value = 8'h5;
    assign hwif_out.I3C_EC.TTI.QUEUE_SIZE.TX_DESC_BUFFER_SIZE.value = 8'h5;
    assign hwif_out.I3C_EC.TTI.QUEUE_SIZE.RX_DATA_BUFFER_SIZE.value = 8'h5;
    assign hwif_out.I3C_EC.TTI.QUEUE_SIZE.TX_DATA_BUFFER_SIZE.value = 8'h5;
    assign hwif_out.I3C_EC.TTI.IBI_QUEUE_SIZE.IBI_QUEUE_SIZE.value = 8'h5;
    // Field: I3CCSR.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.next = next_c;
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value <= 8'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.load_next) begin
                field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value <= field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value;
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.swmod = decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.next = next_c;
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value <= 8'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.load_next) begin
                field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value <= field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value;
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.swmod = decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value & ~decoded_wr_biten[31:24]) | (decoded_wr_data[31:24] & decoded_wr_biten[31:24]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.next = next_c;
        field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value <= 8'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.load_next) begin
                field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value <= field_combo.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value = field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value;
    assign hwif_out.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.swmod = decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value & ~decoded_wr_biten[2:0]) | (decoded_wr_data[2:0] & decoded_wr_biten[2:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.next = next_c;
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.load_next) begin
                field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value <= field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value;
    // Field: I3CCSR.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value & ~decoded_wr_biten[10:8]) | (decoded_wr_data[10:8] & decoded_wr_biten[10:8]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.next = next_c;
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.load_next) begin
                field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value <= field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value;
    // Field: I3CCSR.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value & ~decoded_wr_biten[18:16]) | (decoded_wr_data[18:16] & decoded_wr_biten[18:16]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.next = next_c;
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.load_next) begin
                field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value <= field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value;
    // Field: I3CCSR.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD
    always_comb begin
        automatic logic [2:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value & ~decoded_wr_biten[26:24]) | (decoded_wr_data[26:24] & decoded_wr_biten[26:24]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.next = next_c;
        field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value <= 3'h1;
        end else begin
            if(field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.load_next) begin
                field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value <= field_combo.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.next;
            end
        end
    end
    assign hwif_out.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value = field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value;
    assign hwif_out.I3C_EC.SoCMgmtIf.EXTCAP_HEADER.CAP_ID.value = 8'hc1;
    assign hwif_out.I3C_EC.SoCMgmtIf.EXTCAP_HEADER.CAP_LENGTH.value = 16'h18;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_CFG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value <= field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_CFG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value <= field_combo.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value & ~decoded_wr_biten[7:0]) | (decoded_wr_data[7:0] & decoded_wr_biten[7:0]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value <= field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value;
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.swmod = decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value <= field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value;
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.swmod = decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value & ~decoded_wr_biten[23:16]) | (decoded_wr_data[23:16] & decoded_wr_biten[23:16]);
            load_next_c = '1;
        end else if(hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value <= 8'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value <= field_combo.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value = field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value;
    assign hwif_out.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.swmod = decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && decoded_req_is_wr;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value <= 1'h1;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value & ~decoded_wr_biten[1:1]) | (decoded_wr_data[1:1] & decoded_wr_biten[1:1]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value & ~decoded_wr_biten[2:2]) | (decoded_wr_data[2:2] & decoded_wr_biten[2:2]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value & ~decoded_wr_biten[3:3]) | (decoded_wr_data[3:3] & decoded_wr_biten[3:3]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value & ~decoded_wr_biten[4:4]) | (decoded_wr_data[4:4] & decoded_wr_biten[4:4]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value & ~decoded_wr_biten[5:5]) | (decoded_wr_data[5:5] & decoded_wr_biten[5:5]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value & ~decoded_wr_biten[6:6]) | (decoded_wr_data[6:6] & decoded_wr_biten[6:6]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN
    always_comb begin
        automatic logic [0:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value & ~decoded_wr_biten[7:7]) | (decoded_wr_data[7:7] & decoded_wr_biten[7:7]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value <= 1'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value & ~decoded_wr_biten[31:24]) | (decoded_wr_data[31:24] & decoded_wr_biten[31:24]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value <= 8'h1;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value & ~decoded_wr_biten[15:8]) | (decoded_wr_data[15:8] & decoded_wr_biten[15:8]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value <= 8'hf;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH
    always_comb begin
        automatic logic [7:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value & ~decoded_wr_biten[31:24]) | (decoded_wr_data[31:24] & decoded_wr_biten[31:24]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value <= 8'hf;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value = field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3 && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value <= 32'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value <= field_combo.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value = field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_R_REG.T_R
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_R_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_R_REG.T_R.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_R_REG.T_R.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_R_REG.T_R.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value <= field_combo.I3C_EC.SoCMgmtIf.T_R_REG.T_R.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value = field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_F_REG.T_F
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_F_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_F_REG.T_F.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_F_REG.T_F.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_F_REG.T_F.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value <= field_combo.I3C_EC.SoCMgmtIf.T_F_REG.T_F.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value = field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_DAT_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value <= field_combo.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value = field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_DAT_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value <= field_combo.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value = field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HIGH_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value <= field_combo.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value = field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_LOW_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value <= field_combo.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value = field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_STA_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value <= field_combo.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value = field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STA_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value <= field_combo.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value = field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO
    always_comb begin
        automatic logic [19:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STO_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value & ~decoded_wr_biten[19:0]) | (decoded_wr_data[19:0] & decoded_wr_biten[19:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value <= 20'h0;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value <= field_combo.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value = field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_FREE_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value <= 32'hc;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value <= field_combo.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value = field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_AVAL_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value <= 32'h12c;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value <= field_combo.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value = field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value;
    // Field: I3CCSR.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE
    always_comb begin
        automatic logic [31:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value;
        load_next_c = '0;
        if(decoded_reg_strb.I3C_EC.SoCMgmtIf.T_IDLE_REG && decoded_req_is_wr) begin // SW write
            next_c = (field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]);
            load_next_c = '1;
        end
        field_combo.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.next = next_c;
        field_combo.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value <= 32'hea60;
        end else begin
            if(field_combo.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.load_next) begin
                field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value <= field_combo.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value = field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value;
    assign hwif_out.I3C_EC.CtrlCfg.EXTCAP_HEADER.CAP_ID.value = 8'h2;
    assign hwif_out.I3C_EC.CtrlCfg.EXTCAP_HEADER.CAP_LENGTH.value = 16'h2;
    // Field: I3CCSR.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE
    always_comb begin
        automatic logic [1:0] next_c;
        automatic logic load_next_c;
        next_c = field_storage.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value;
        load_next_c = '0;
        if(hwif_in.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.we) begin // HW Write - we
            next_c = hwif_in.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.next;
            load_next_c = '1;
        end
        field_combo.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.next = next_c;
        field_combo.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.load_next = load_next_c;
    end
    always_ff @(posedge clk or negedge hwif_in.rst_ni) begin
        if(~hwif_in.rst_ni) begin
            field_storage.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value <= 2'h1;
        end else begin
            if(field_combo.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.load_next) begin
                field_storage.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value <= field_combo.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.next;
            end
        end
    end
    assign hwif_out.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value = field_storage.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value;
    assign hwif_out.I3C_EC.TERMINATION_EXTCAP_HEADER.CAP_ID.value = 8'h0;
    assign hwif_out.I3C_EC.TERMINATION_EXTCAP_HEADER.CAP_LENGTH.value = 16'h1;

    //--------------------------------------------------------------------------
    // Write response
    //--------------------------------------------------------------------------
    always_comb begin
        automatic logic wr_ack;
        wr_ack = '0;
        wr_ack |= hwif_in.I3C_EC.TTI.TX_DESC_QUEUE_PORT.wr_ack;
        wr_ack |= hwif_in.I3C_EC.TTI.TX_DATA_PORT.wr_ack;
        wr_ack |= hwif_in.I3C_EC.TTI.IBI_PORT.wr_ack;
        external_wr_ack = wr_ack;
    end
    assign cpuif_wr_ack = external_wr_ack | (decoded_req & decoded_req_is_wr & ~decoded_strb_is_external);
    // Writes are always granted with no error response
    assign cpuif_wr_err = '0;

    //--------------------------------------------------------------------------
    // Readback
    //--------------------------------------------------------------------------
    logic readback_external_rd_ack_c;
    always_comb begin
        automatic logic rd_ack;
        rd_ack = '0;
        rd_ack |= hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.rd_ack;
        rd_ack |= hwif_in.I3C_EC.TTI.RX_DESC_QUEUE_PORT.rd_ack;
        rd_ack |= hwif_in.I3C_EC.TTI.RX_DATA_PORT.rd_ack;
        readback_external_rd_ack_c = rd_ack;
    end

    logic readback_external_rd_ack;

    assign readback_external_rd_ack = readback_external_rd_ack_c;

    logic readback_err;
    logic readback_done;
    logic [31:0] readback_data;

    // Assign readback values to a flattened array
    logic [31:0] readback_array[82];
    assign readback_array[0][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'hc0 : '0;
    assign readback_array[0][23:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h20 : '0;
    assign readback_array[0][31:24] = '0;
    assign readback_array[1][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_0 && !decoded_req_is_wr) ? 32'h2050434f : '0;
    assign readback_array[2][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_1 && !decoded_req_is_wr) ? 32'h56434552 : '0;
    assign readback_array[3][15:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.REC_PROT_VERSION.value : '0;
    assign readback_array[3][31:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_2.AGENT_CAPS.value : '0;
    assign readback_array[4][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.NUM_OF_CMS_REGIONS.value : '0;
    assign readback_array[4][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.MAX_RESP_TIME.value : '0;
    assign readback_array[4][23:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.PROT_CAP_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.PROT_CAP_3.HEARTBEAT_PERIOD.value : '0;
    assign readback_array[4][31:24] = '0;
    assign readback_array[5][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DESC_TYPE.value : '0;
    assign readback_array[5][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.VENDOR_SPECIFIC_STR_LENGTH.value : '0;
    assign readback_array[5][31:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_0.DATA.value : '0;
    assign readback_array[6][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_1.DATA.value : '0;
    assign readback_array[7][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_2.DATA.value : '0;
    assign readback_array[8][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_3.DATA.value : '0;
    assign readback_array[9][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_4.DATA.value : '0;
    assign readback_array[10][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_ID_5.DATA.value : '0;
    assign readback_array[11][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_ID_RESERVED && !decoded_req_is_wr) ? 32'h0 : '0;
    assign readback_array[12][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.DEV_STATUS.value : '0;
    assign readback_array[12][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.PROT_ERROR.value : '0;
    assign readback_array[12][31:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_0.REC_REASON_CODE.value : '0;
    assign readback_array[13][15:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.HEARTBEAT.value : '0;
    assign readback_array[13][24:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS_LENGTH.value : '0;
    assign readback_array[13][31:25] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_STATUS_1.VENDOR_STATUS.value : '0;
    assign readback_array[14][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.RESET_CTRL.value : '0;
    assign readback_array[14][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.FORCED_RECOVERY.value : '0;
    assign readback_array[14][23:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.DEVICE_RESET && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.DEVICE_RESET.IF_CTRL.value : '0;
    assign readback_array[14][31:24] = '0;
    assign readback_array[15][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.CMS.value : '0;
    assign readback_array[15][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.REC_IMG_SEL.value : '0;
    assign readback_array[15][23:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_CTRL.ACTIVATE_REC_IMG.value : '0;
    assign readback_array[15][31:24] = '0;
    assign readback_array[16][3:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.DEV_REC_STATUS.value : '0;
    assign readback_array[16][7:4] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.REC_IMG_INDEX.value : '0;
    assign readback_array[16][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.RECOVERY_STATUS.VENDOR_SPECIFIC_STATUS.value : '0;
    assign readback_array[16][31:16] = '0;
    assign readback_array[17][0:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.TEMP_CRITICAL.value : '0;
    assign readback_array[17][1:1] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.SOFT_ERR.value : '0;
    assign readback_array[17][2:2] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.FATAL_ERR.value : '0;
    assign readback_array[17][7:3] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.RESERVED_7_3.value : '0;
    assign readback_array[17][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS.value : '0;
    assign readback_array[17][23:16] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.CTEMP.value : '0;
    assign readback_array[17][31:24] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.HW_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.HW_STATUS.VENDOR_HW_STATUS_LEN.value : '0;
    assign readback_array[18][7:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.CMS.value : '0;
    assign readback_array[18][15:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_0.RESET.value : '0;
    assign readback_array[18][31:16] = '0;
    assign readback_array[19][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_CTRL_1.IMAGE_SIZE.value : '0;
    assign readback_array[20][0:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.EMPTY.value : '0;
    assign readback_array[20][1:1] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.FULL.value : '0;
    assign readback_array[20][7:2] = '0;
    assign readback_array[20][10:8] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_0.REGION_TYPE.value : '0;
    assign readback_array[20][31:11] = '0;
    assign readback_array[21][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_1.WRITE_INDEX.value : '0;
    assign readback_array[22][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_2.READ_INDEX.value : '0;
    assign readback_array[23][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_3.FIFO_SIZE.value : '0;
    assign readback_array[24][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_STATUS_4 && !decoded_req_is_wr) ? 32'h40 : '0;
    assign readback_array[25][31:0] = (decoded_reg_strb.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED && !decoded_req_is_wr) ? field_storage.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_RESERVED.DATA.value : '0;
    assign readback_array[26] = hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.rd_ack ? hwif_in.I3C_EC.SecFwRecoveryIf.INDIRECT_FIFO_DATA.rd_data : '0;
    assign readback_array[27][7:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'h12 : '0;
    assign readback_array[27][23:8] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h10 : '0;
    assign readback_array[27][31:24] = '0;
    assign readback_array[28][0:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PENDING_RX_NACK.value : '0;
    assign readback_array[28][1:1] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DELAY_NACK.value : '0;
    assign readback_array[28][2:2] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.ACR_FSM_OP_SELECT.value : '0;
    assign readback_array[28][3:3] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.PRIME_ACCEPT_GETACCCR.value : '0;
    assign readback_array[28][4:4] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.HANDOFF_DEEP_SLEEP.value : '0;
    assign readback_array[28][7:5] = '0;
    assign readback_array[28][10:8] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.BAST_CCC_IBI_RING.value : '0;
    assign readback_array[28][11:11] = '0;
    assign readback_array[28][12:12] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.TARGET_XACT_ENABLE.value : '0;
    assign readback_array[28][13:13] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETAASA_ENABLE.value : '0;
    assign readback_array[28][14:14] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_SETDASA_ENABLE.value : '0;
    assign readback_array[28][15:15] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.DAA_ENTDAA_ENABLE.value : '0;
    assign readback_array[28][19:16] = '0;
    assign readback_array[28][20:20] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.RSTACT_DEFBYTE_02.value : '0;
    assign readback_array[28][29:21] = '0;
    assign readback_array[28][31:30] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CONTROL.STBY_CR_ENABLE_INIT.value : '0;
    assign readback_array[29][6:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR.value : '0;
    assign readback_array[29][14:7] = '0;
    assign readback_array[29][15:15] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.STATIC_ADDR_VALID.value : '0;
    assign readback_array[29][22:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR.value : '0;
    assign readback_array[29][30:23] = '0;
    assign readback_array[29][31:31] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_ADDR.DYNAMIC_ADDR_VALID.value : '0;
    assign readback_array[30][4:0] = '0;
    assign readback_array[30][5:5] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES && !decoded_req_is_wr) ? 1'h0 : '0;
    assign readback_array[30][11:6] = '0;
    assign readback_array[30][12:12] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES && !decoded_req_is_wr) ? 1'h1 : '0;
    assign readback_array[30][13:13] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES && !decoded_req_is_wr) ? 1'h1 : '0;
    assign readback_array[30][14:14] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES && !decoded_req_is_wr) ? 1'h1 : '0;
    assign readback_array[30][15:15] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CAPABILITIES && !decoded_req_is_wr) ? 1'h0 : '0;
    assign readback_array[30][31:16] = '0;
    assign readback_array[31][0:0] = '0;
    assign readback_array[31][15:1] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.PID_HI.value : '0;
    assign readback_array[31][23:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.DCR.value : '0;
    assign readback_array[31][28:24] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_VAR.value : '0;
    assign readback_array[31][31:29] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_CHAR.BCR_FIXED.value : '0;
    assign readback_array[32][1:0] = '0;
    assign readback_array[32][2:2] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.AC_CURRENT_OWN.value : '0;
    assign readback_array[32][4:3] = '0;
    assign readback_array[32][7:5] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.SIMPLE_CRR_STATUS.value : '0;
    assign readback_array[32][8:8] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_STATUS.HJ_REQ_STATUS.value : '0;
    assign readback_array[32][31:9] = '0;
    assign readback_array[33][0:0] = '0;
    assign readback_array[33][15:1] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.PID_HI.value : '0;
    assign readback_array[33][23:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.DCR.value : '0;
    assign readback_array[33][28:24] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_VAR.value : '0;
    assign readback_array[33][31:29] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_CHAR.BCR_FIXED.value : '0;
    assign readback_array[34][31:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_DEVICE_PID_LO.PID_LO.value : '0;
    assign readback_array[35][0:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_REMAIN_STAT.value : '0;
    assign readback_array[35][1:1] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_OK_PRIMED_STAT.value : '0;
    assign readback_array[35][2:2] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_FAIL_STAT.value : '0;
    assign readback_array[35][3:3] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.ACR_HANDOFF_ERR_M3_STAT.value : '0;
    assign readback_array[35][9:4] = '0;
    assign readback_array[35][10:10] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CRR_RESPONSE_STAT.value : '0;
    assign readback_array[35][11:11] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_DYN_ADDR_STAT.value : '0;
    assign readback_array[35][12:12] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_NACKED_STAT.value : '0;
    assign readback_array[35][13:13] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_OK_STAT.value : '0;
    assign readback_array[35][14:14] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_ACCEPT_ERR_STAT.value : '0;
    assign readback_array[35][15:15] = '0;
    assign readback_array[35][16:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.STBY_CR_OP_RSTACT_STAT.value : '0;
    assign readback_array[35][17:17] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_PARAM_MODIFIED_STAT.value : '0;
    assign readback_array[35][18:18] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_UNHANDLED_NACK_STAT.value : '0;
    assign readback_array[35][19:19] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_STATUS.CCC_FATAL_RSTDAA_ERR_STAT.value : '0;
    assign readback_array[35][31:20] = '0;
    assign readback_array[36][31:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRTUAL_DEVICE_PID_LO.PID_LO.value : '0;
    assign readback_array[37][0:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_REMAIN_SIGNAL_EN.value : '0;
    assign readback_array[37][1:1] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_OK_PRIMED_SIGNAL_EN.value : '0;
    assign readback_array[37][2:2] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_FAIL_SIGNAL_EN.value : '0;
    assign readback_array[37][3:3] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.ACR_HANDOFF_ERR_M3_SIGNAL_EN.value : '0;
    assign readback_array[37][9:4] = '0;
    assign readback_array[37][10:10] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CRR_RESPONSE_SIGNAL_EN.value : '0;
    assign readback_array[37][11:11] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_DYN_ADDR_SIGNAL_EN.value : '0;
    assign readback_array[37][12:12] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_NACKED_SIGNAL_EN.value : '0;
    assign readback_array[37][13:13] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_OK_SIGNAL_EN.value : '0;
    assign readback_array[37][14:14] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_ACCEPT_ERR_SIGNAL_EN.value : '0;
    assign readback_array[37][15:15] = '0;
    assign readback_array[37][16:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.STBY_CR_OP_RSTACT_SIGNAL_EN.value : '0;
    assign readback_array[37][17:17] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_PARAM_MODIFIED_SIGNAL_EN.value : '0;
    assign readback_array[37][18:18] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_UNHANDLED_NACK_SIGNAL_EN.value : '0;
    assign readback_array[37][19:19] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_SIGNAL_ENABLE.CCC_FATAL_RSTDAA_ERR_SIGNAL_EN.value : '0;
    assign readback_array[37][31:20] = '0;
    assign readback_array[38][9:0] = '0;
    assign readback_array[38][10:10] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CRR_RESPONSE_FORCE.value : '0;
    assign readback_array[38][11:11] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_DYN_ADDR_FORCE.value : '0;
    assign readback_array[38][12:12] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_NACKED_FORCE.value : '0;
    assign readback_array[38][13:13] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_OK_FORCE.value : '0;
    assign readback_array[38][14:14] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.STBY_CR_ACCEPT_ERR_FORCE.value : '0;
    assign readback_array[38][16:15] = '0;
    assign readback_array[38][17:17] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_PARAM_MODIFIED_FORCE.value : '0;
    assign readback_array[38][18:18] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_UNHANDLED_NACK_FORCE.value : '0;
    assign readback_array[38][19:19] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_INTR_FORCE.CCC_FATAL_RSTDAA_ERR_FORCE.value : '0;
    assign readback_array[38][31:20] = '0;
    assign readback_array[39][2:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP1_BUS_CONFIG.value : '0;
    assign readback_array[39][7:3] = '0;
    assign readback_array[39][11:8] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_GETCAPS.F2_CRCAP2_DEV_INTERACT.value : '0;
    assign readback_array[39][31:12] = '0;
    assign readback_array[40][7:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RST_ACTION.value : '0;
    assign readback_array[40][15:8] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_PERIPHERAL.value : '0;
    assign readback_array[40][23:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_TIME_TARGET.value : '0;
    assign readback_array[40][30:24] = '0;
    assign readback_array[40][31:31] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_CCC_CONFIG_RSTACT_PARAMS.RESET_DYNAMIC_ADDR.value : '0;
    assign readback_array[41][6:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR.value : '0;
    assign readback_array[41][14:7] = '0;
    assign readback_array[41][15:15] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_STATIC_ADDR_VALID.value : '0;
    assign readback_array[41][22:16] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR.value : '0;
    assign readback_array[41][30:23] = '0;
    assign readback_array[41][31:31] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.STBY_CR_VIRT_DEVICE_ADDR.VIRT_DYNAMIC_ADDR_VALID.value : '0;
    assign readback_array[42][31:0] = (decoded_reg_strb.I3C_EC.StdbyCtrlMode.__rsvd_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.StdbyCtrlMode.__rsvd_3.__rsvd.value : '0;
    assign readback_array[43][7:0] = (decoded_reg_strb.I3C_EC.TTI.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'hc4 : '0;
    assign readback_array[43][23:8] = (decoded_reg_strb.I3C_EC.TTI.EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h10 : '0;
    assign readback_array[43][31:24] = '0;
    assign readback_array[44][9:0] = '0;
    assign readback_array[44][10:10] = (decoded_reg_strb.I3C_EC.TTI.CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.CONTROL.HJ_EN.value : '0;
    assign readback_array[44][11:11] = (decoded_reg_strb.I3C_EC.TTI.CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.CONTROL.CRR_EN.value : '0;
    assign readback_array[44][12:12] = (decoded_reg_strb.I3C_EC.TTI.CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.CONTROL.IBI_EN.value : '0;
    assign readback_array[44][15:13] = (decoded_reg_strb.I3C_EC.TTI.CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.CONTROL.IBI_RETRY_NUM.value : '0;
    assign readback_array[44][31:16] = '0;
    assign readback_array[45][12:0] = '0;
    assign readback_array[45][13:13] = (decoded_reg_strb.I3C_EC.TTI.STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.STATUS.PROTOCOL_ERROR.value : '0;
    assign readback_array[45][15:14] = (decoded_reg_strb.I3C_EC.TTI.STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.STATUS.LAST_IBI_STATUS.value : '0;
    assign readback_array[45][31:16] = '0;
    assign readback_array[46][0:0] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.SOFT_RST.value : '0;
    assign readback_array[46][1:1] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DESC_RST.value : '0;
    assign readback_array[46][2:2] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DESC_RST.value : '0;
    assign readback_array[46][3:3] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.TX_DATA_RST.value : '0;
    assign readback_array[46][4:4] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.RX_DATA_RST.value : '0;
    assign readback_array[46][5:5] = (decoded_reg_strb.I3C_EC.TTI.RESET_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.RESET_CONTROL.IBI_QUEUE_RST.value : '0;
    assign readback_array[46][31:6] = '0;
    assign readback_array[47][0:0] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_STAT.value : '0;
    assign readback_array[47][1:1] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_STAT.value : '0;
    assign readback_array[47][2:2] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_TIMEOUT.value : '0;
    assign readback_array[47][3:3] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_TIMEOUT.value : '0;
    assign readback_array[47][7:4] = '0;
    assign readback_array[47][8:8] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DATA_THLD_STAT.value : '0;
    assign readback_array[47][9:9] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DATA_THLD_STAT.value : '0;
    assign readback_array[47][10:10] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_THLD_STAT.value : '0;
    assign readback_array[47][11:11] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.RX_DESC_THLD_STAT.value : '0;
    assign readback_array[47][12:12] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_THLD_STAT.value : '0;
    assign readback_array[47][13:13] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.IBI_DONE.value : '0;
    assign readback_array[47][14:14] = '0;
    assign readback_array[47][18:15] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.PENDING_INTERRUPT.value : '0;
    assign readback_array[47][24:19] = '0;
    assign readback_array[47][25:25] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ABORT_STAT.value : '0;
    assign readback_array[47][26:26] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TX_DESC_COMPLETE.value : '0;
    assign readback_array[47][30:27] = '0;
    assign readback_array[47][31:31] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_STATUS.TRANSFER_ERR_STAT.value : '0;
    assign readback_array[48][0:0] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_STAT_EN.value : '0;
    assign readback_array[48][1:1] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_STAT_EN.value : '0;
    assign readback_array[48][2:2] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_TIMEOUT_EN.value : '0;
    assign readback_array[48][3:3] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_TIMEOUT_EN.value : '0;
    assign readback_array[48][7:4] = '0;
    assign readback_array[48][8:8] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DATA_THLD_STAT_EN.value : '0;
    assign readback_array[48][9:9] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DATA_THLD_STAT_EN.value : '0;
    assign readback_array[48][10:10] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_THLD_STAT_EN.value : '0;
    assign readback_array[48][11:11] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.RX_DESC_THLD_STAT_EN.value : '0;
    assign readback_array[48][12:12] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_THLD_STAT_EN.value : '0;
    assign readback_array[48][13:13] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.IBI_DONE_EN.value : '0;
    assign readback_array[48][24:14] = '0;
    assign readback_array[48][25:25] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ABORT_STAT_EN.value : '0;
    assign readback_array[48][26:26] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TX_DESC_COMPLETE_EN.value : '0;
    assign readback_array[48][30:27] = '0;
    assign readback_array[48][31:31] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_ENABLE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_ENABLE.TRANSFER_ERR_STAT_EN.value : '0;
    assign readback_array[49][0:0] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_STAT_FORCE.value : '0;
    assign readback_array[49][1:1] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_STAT_FORCE.value : '0;
    assign readback_array[49][2:2] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_TIMEOUT_FORCE.value : '0;
    assign readback_array[49][3:3] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_TIMEOUT_FORCE.value : '0;
    assign readback_array[49][7:4] = '0;
    assign readback_array[49][8:8] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DATA_THLD_FORCE.value : '0;
    assign readback_array[49][9:9] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DATA_THLD_FORCE.value : '0;
    assign readback_array[49][10:10] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_THLD_FORCE.value : '0;
    assign readback_array[49][11:11] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.RX_DESC_THLD_FORCE.value : '0;
    assign readback_array[49][12:12] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_THLD_FORCE.value : '0;
    assign readback_array[49][13:13] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.IBI_DONE_FORCE.value : '0;
    assign readback_array[49][24:14] = '0;
    assign readback_array[49][25:25] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ABORT_STAT_FORCE.value : '0;
    assign readback_array[49][26:26] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TX_DESC_COMPLETE_FORCE.value : '0;
    assign readback_array[49][30:27] = '0;
    assign readback_array[49][31:31] = (decoded_reg_strb.I3C_EC.TTI.INTERRUPT_FORCE && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.INTERRUPT_FORCE.TRANSFER_ERR_STAT_FORCE.value : '0;
    assign readback_array[50] = hwif_in.I3C_EC.TTI.RX_DESC_QUEUE_PORT.rd_ack ? hwif_in.I3C_EC.TTI.RX_DESC_QUEUE_PORT.rd_data : '0;
    assign readback_array[51] = hwif_in.I3C_EC.TTI.RX_DATA_PORT.rd_ack ? hwif_in.I3C_EC.TTI.RX_DATA_PORT.rd_data : '0;
    assign readback_array[52][7:0] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_SIZE && !decoded_req_is_wr) ? 8'h5 : '0;
    assign readback_array[52][15:8] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_SIZE && !decoded_req_is_wr) ? 8'h5 : '0;
    assign readback_array[52][23:16] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_SIZE && !decoded_req_is_wr) ? 8'h5 : '0;
    assign readback_array[52][31:24] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_SIZE && !decoded_req_is_wr) ? 8'h5 : '0;
    assign readback_array[53][7:0] = (decoded_reg_strb.I3C_EC.TTI.IBI_QUEUE_SIZE && !decoded_req_is_wr) ? 8'h5 : '0;
    assign readback_array[53][31:8] = '0;
    assign readback_array[54][7:0] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.TX_DESC_THLD.value : '0;
    assign readback_array[54][15:8] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.RX_DESC_THLD.value : '0;
    assign readback_array[54][23:16] = '0;
    assign readback_array[54][31:24] = (decoded_reg_strb.I3C_EC.TTI.QUEUE_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.QUEUE_THLD_CTRL.IBI_THLD.value : '0;
    assign readback_array[55][2:0] = (decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_DATA_THLD.value : '0;
    assign readback_array[55][7:3] = '0;
    assign readback_array[55][10:8] = (decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_DATA_THLD.value : '0;
    assign readback_array[55][15:11] = '0;
    assign readback_array[55][18:16] = (decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.TX_START_THLD.value : '0;
    assign readback_array[55][23:19] = '0;
    assign readback_array[55][26:24] = (decoded_reg_strb.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL && !decoded_req_is_wr) ? field_storage.I3C_EC.TTI.DATA_BUFFER_THLD_CTRL.RX_START_THLD.value : '0;
    assign readback_array[55][31:27] = '0;
    assign readback_array[56][7:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'hc1 : '0;
    assign readback_array[56][23:8] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h18 : '0;
    assign readback_array[56][31:24] = '0;
    assign readback_array[57][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_CONTROL.PLACEHOLDER.value : '0;
    assign readback_array[58][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_STATUS.PLACEHOLDER.value : '0;
    assign readback_array[59][0:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_CFG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_INTF_BYPASS.value : '0;
    assign readback_array[59][1:1] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_CFG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.REC_INTF_CFG.REC_PAYLOAD_DONE.value : '0;
    assign readback_array[59][31:2] = '0;
    assign readback_array[60][7:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.DEVICE_RESET_CTRL.value : '0;
    assign readback_array[60][15:8] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.RECOVERY_CTRL_ACTIVATE_REC_IMG.value : '0;
    assign readback_array[60][23:16] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.REC_INTF_REG_W1C_ACCESS.INDIRECT_FIFO_CTRL_RESET.value : '0;
    assign readback_array[60][31:24] = '0;
    assign readback_array[61][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_2.PLACEHOLDER.value : '0;
    assign readback_array[62][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_RSVD_3.PLACEHOLDER.value : '0;
    assign readback_array[63][0:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.INPUT_ENABLE.value : '0;
    assign readback_array[63][1:1] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.SCHMITT_EN.value : '0;
    assign readback_array[63][2:2] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.KEEPER_EN.value : '0;
    assign readback_array[63][3:3] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_DIR.value : '0;
    assign readback_array[63][4:4] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PULL_EN.value : '0;
    assign readback_array[63][5:5] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.IO_INVERSION.value : '0;
    assign readback_array[63][6:6] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.OD_EN.value : '0;
    assign readback_array[63][7:7] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.VIRTUAL_OD_EN.value : '0;
    assign readback_array[63][23:8] = '0;
    assign readback_array[63][31:24] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_CONF && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_CONF.PAD_TYPE.value : '0;
    assign readback_array[64][7:0] = '0;
    assign readback_array[64][15:8] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_SLEW_RATE.value : '0;
    assign readback_array[64][23:16] = '0;
    assign readback_array[64][31:24] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_PAD_ATTR.DRIVE_STRENGTH.value : '0;
    assign readback_array[65][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2 && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_2.PLACEHOLDER.value : '0;
    assign readback_array[66][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3 && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.SOC_MGMT_FEATURE_3.PLACEHOLDER.value : '0;
    assign readback_array[67][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_R_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_R_REG.T_R.value : '0;
    assign readback_array[67][31:20] = '0;
    assign readback_array[68][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_F_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_F_REG.T_F.value : '0;
    assign readback_array[68][31:20] = '0;
    assign readback_array[69][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_DAT_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_SU_DAT_REG.T_SU_DAT.value : '0;
    assign readback_array[69][31:20] = '0;
    assign readback_array[70][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_DAT_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_HD_DAT_REG.T_HD_DAT.value : '0;
    assign readback_array[70][31:20] = '0;
    assign readback_array[71][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HIGH_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_HIGH_REG.T_HIGH.value : '0;
    assign readback_array[71][31:20] = '0;
    assign readback_array[72][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_LOW_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_LOW_REG.T_LOW.value : '0;
    assign readback_array[72][31:20] = '0;
    assign readback_array[73][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_HD_STA_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_HD_STA_REG.T_HD_STA.value : '0;
    assign readback_array[73][31:20] = '0;
    assign readback_array[74][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STA_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_SU_STA_REG.T_SU_STA.value : '0;
    assign readback_array[74][31:20] = '0;
    assign readback_array[75][19:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_SU_STO_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_SU_STO_REG.T_SU_STO.value : '0;
    assign readback_array[75][31:20] = '0;
    assign readback_array[76][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_FREE_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_FREE_REG.T_FREE.value : '0;
    assign readback_array[77][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_AVAL_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_AVAL_REG.T_AVAL.value : '0;
    assign readback_array[78][31:0] = (decoded_reg_strb.I3C_EC.SoCMgmtIf.T_IDLE_REG && !decoded_req_is_wr) ? field_storage.I3C_EC.SoCMgmtIf.T_IDLE_REG.T_IDLE.value : '0;
    assign readback_array[79][7:0] = (decoded_reg_strb.I3C_EC.CtrlCfg.EXTCAP_HEADER && !decoded_req_is_wr) ? 8'h2 : '0;
    assign readback_array[79][23:8] = (decoded_reg_strb.I3C_EC.CtrlCfg.EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h2 : '0;
    assign readback_array[79][31:24] = '0;
    assign readback_array[80][3:0] = '0;
    assign readback_array[80][5:4] = (decoded_reg_strb.I3C_EC.CtrlCfg.CONTROLLER_CONFIG && !decoded_req_is_wr) ? field_storage.I3C_EC.CtrlCfg.CONTROLLER_CONFIG.OPERATION_MODE.value : '0;
    assign readback_array[80][31:6] = '0;
    assign readback_array[81][7:0] = (decoded_reg_strb.I3C_EC.TERMINATION_EXTCAP_HEADER && !decoded_req_is_wr) ? 8'h0 : '0;
    assign readback_array[81][23:8] = (decoded_reg_strb.I3C_EC.TERMINATION_EXTCAP_HEADER && !decoded_req_is_wr) ? 16'h1 : '0;
    assign readback_array[81][31:24] = '0;

    // Reduce the array
    always_comb begin
        automatic logic [31:0] readback_data_var;
        readback_done = decoded_req & ~decoded_req_is_wr & ~decoded_strb_is_external;
        readback_err = '0;
        readback_data_var = '0;
        for(int i=0; i<82; i++) readback_data_var |= readback_array[i];
        readback_data = readback_data_var;
    end

    assign external_rd_ack = readback_external_rd_ack;
    assign cpuif_rd_ack = readback_done | readback_external_rd_ack;
    assign cpuif_rd_data = readback_data;
    assign cpuif_rd_err = readback_err;
endmodule
