{#
Sources Template - Source File Management

This template handles discovery and addition of source files to the Vivado project.

Context variables expected:
- header: TCL header comment
#}
{{ header }}

puts "Adding source files..."

# Add all SystemVerilog files
set sv_files [glob -nocomplain *.sv]
if {[llength $sv_files] > 0} {
    puts "Found [llength $sv_files] SystemVerilog files"
    add_files -norecurse $sv_files
    set_property file_type SystemVerilog [get_files *.sv]
    foreach sv_file $sv_files {
        puts "  - $sv_file"
    }
}

# Add all Verilog files
set v_files [glob -nocomplain *.v]
if {[llength $v_files] > 0} {
    puts "Found [llength $v_files] Verilog files"
    add_files -norecurse $v_files
    foreach v_file $v_files {
        puts "  - $v_file"
    }
}

# Add all constraint files
set xdc_files [glob -nocomplain *.xdc]
if {[llength $xdc_files] > 0} {
    puts "Found [llength $xdc_files] constraint files"
    add_files -fileset constrs_1 -norecurse $xdc_files
    foreach xdc_file $xdc_files {
        puts "  - $xdc_file"
    }
}

# Set top module
set top_module ""
if {[file exists "pcileech_top.sv"]} {
    set top_module "pcileech_top"
} elseif {[file exists "pcileech_tlps128_bar_controller.sv"]} {
    set top_module "pcileech_tlps128_bar_controller"
} else {
    set top_files [glob -nocomplain "*top*.sv"]
    if {[llength $top_files] > 0} {
        set top_module [file rootname [file tail [lindex $top_files 0]]]
    }
}

if {$top_module ne ""} {
    puts "Setting top module: $top_module"
    set_property top $top_module [current_fileset]
} else {
    puts "WARNING: No top module found, using default"
}

puts "Source files added successfully"