(kicad_pcb (version 20171130) (host pcbnew "(5.1.4-0-10_14)")

  (general
    (thickness 1.6)
    (drawings 4)
    (tracks 0)
    (zones 0)
    (modules 8)
    (nets 16)
  )

  (page A4)
  (layers
    (0 Top signal)
    (31 Bottom signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.3048)
    (trace_clearance 0.1524)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed yes)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFFFF)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 GND)
  (net 2 VDD)
  (net 3 /SDA)
  (net 4 /SCL)
  (net 5 "Net-(R2-Pad1)")
  (net 6 "Net-(R1-Pad1)")
  (net 7 "Net-(U1-Pad14)")
  (net 8 "Net-(U1-Pad13)")
  (net 9 "Net-(U1-Pad12)")
  (net 10 "Net-(U1-Pad11)")
  (net 11 "Net-(U1-Pad10)")
  (net 12 "Net-(C1-Pad1)")
  (net 13 "Net-(C1-Pad2)")
  (net 14 "Net-(C2-Pad2)")
  (net 15 "Net-(U1-Pad1)")

  (net_class Default "This is the default net class."
    (clearance 0.1524)
    (trace_width 0.3048)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net /SCL)
    (add_net /SDA)
    (add_net GND)
    (add_net "Net-(C1-Pad1)")
    (add_net "Net-(C1-Pad2)")
    (add_net "Net-(C2-Pad2)")
    (add_net "Net-(R1-Pad1)")
    (add_net "Net-(R2-Pad1)")
    (add_net "Net-(U1-Pad1)")
    (add_net "Net-(U1-Pad10)")
    (add_net "Net-(U1-Pad11)")
    (add_net "Net-(U1-Pad12)")
    (add_net "Net-(U1-Pad13)")
    (add_net "Net-(U1-Pad14)")
    (add_net VDD)
  )

  (module imu:C0805 (layer Top) (tedit 5DCDEC05) (tstamp 5DC8EB23)
    (at 149.606 100.8634 270)
    (descr <b>CAPACITOR</b><p>)
    (path /A60240AA)
    (fp_text reference U1 (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -1.97 -0.98) (xy 1.97 -0.98) (xy 1.97 0.98) (xy -1.97 0.98)) (layer F.CrtYd) (width 0.05))
    (pad 2 smd rect (at 0.95 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.95 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
  )

  (module imu:C0805 (layer Top) (tedit 5DCDEC05) (tstamp 5DC8EB31)
    (at 151.8666 100.8634 270)
    (descr <b>CAPACITOR</b><p>)
    (path /C3EA450F)
    (fp_text reference U2 (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -1.97 -0.98) (xy 1.97 -0.98) (xy 1.97 0.98) (xy -1.97 0.98)) (layer F.CrtYd) (width 0.05))
    (pad 2 smd rect (at 0.95 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.95 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
  )

  (module imu:C0805 (layer Top) (tedit 5DCDEC05) (tstamp 5DC8EB3F)
    (at 140.5636 105.2322 90)
    (descr <b>CAPACITOR</b><p>)
    (path /7A0BA227)
    (fp_text reference U3 (at 0 0 90) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 90) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -1.97 -0.98) (xy 1.97 -0.98) (xy 1.97 0.98) (xy -1.97 0.98)) (layer F.CrtYd) (width 0.05))
    (pad 2 smd rect (at 0.95 0 90) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 13 "Net-(C1-Pad2)") (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.95 0 90) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 12 "Net-(C1-Pad1)") (solder_mask_margin 0.1016))
  )

  (module imu:C0805 (layer Top) (tedit 5DCDEC05) (tstamp 5DC8EB4D)
    (at 142.7988 100.6856 180)
    (descr <b>CAPACITOR</b><p>)
    (path /39D9FF9F)
    (fp_text reference U4 (at 0 0 180) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 180) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -1.97 -0.98) (xy 1.97 -0.98) (xy 1.97 0.98) (xy -1.97 0.98)) (layer F.CrtYd) (width 0.05))
    (pad 2 smd rect (at 0.95 0 180) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 14 "Net-(C2-Pad2)") (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.95 0 180) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
  )

  (module imu:LGA-24 (layer Top) (tedit 5DCDEC7A) (tstamp 5DC8EAD5)
    (at 145.0594 105.2068 270)
    (descr "<h3>LGA 4x4x1 mm 24-lead</h3>\n<ul><li>0.5mm pitch</li>\n<li>Pads are 0.35x0.2 mm square</li>\n</ul>\n<p>This package is used for:<p>\n<ul><li>ST Micro LSM9DS0 3D accel/gyro/mag</li></ul>")
    (path /94FABF20)
    (fp_text reference U5 (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -3 -3) (xy 3 -3) (xy 3 3) (xy -3 3)) (layer F.CrtYd) (width 0.1))
    (pad 24 smd rect (at -1.25 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 3 /SDA) (solder_mask_margin 0.1016))
    (pad 23 smd rect (at -0.75 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 22 smd rect (at -0.25 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 21 smd rect (at 0.25 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 4 /SCL) (solder_mask_margin 0.1016))
    (pad 20 smd rect (at 0.75 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 5 "Net-(R2-Pad1)") (solder_mask_margin 0.1016))
    (pad 19 smd rect (at 1.25 -2.129 270) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 6 "Net-(R1-Pad1)") (solder_mask_margin 0.1016))
    (pad 18 smd rect (at 2.129 -1.25 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 17 smd rect (at 2.129 -0.75 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 16 smd rect (at 2.129 -0.25 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 15 smd rect (at 2.129 0.25 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 14 smd rect (at 2.129 0.75 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 7 "Net-(U1-Pad14)") (solder_mask_margin 0.1016))
    (pad 13 smd rect (at 2.129 1.25 180) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 8 "Net-(U1-Pad13)") (solder_mask_margin 0.1016))
    (pad 12 smd rect (at 1.25 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 9 "Net-(U1-Pad12)") (solder_mask_margin 0.1016))
    (pad 11 smd rect (at 0.75 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 10 "Net-(U1-Pad11)") (solder_mask_margin 0.1016))
    (pad 10 smd rect (at 0.25 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 11 "Net-(U1-Pad10)") (solder_mask_margin 0.1016))
    (pad 9 smd rect (at -0.25 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 12 "Net-(C1-Pad1)") (solder_mask_margin 0.1016))
    (pad 8 smd rect (at -0.75 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 13 "Net-(C1-Pad2)") (solder_mask_margin 0.1016))
    (pad 7 smd rect (at -1.25 2.129 90) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 14 "Net-(C2-Pad2)") (solder_mask_margin 0.1016))
    (pad 6 smd rect (at -2.129 1.25) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 5 smd rect (at -2.129 0.75) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 4 smd rect (at -2.129 0.25) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 3 smd rect (at -2.129 -0.25) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 2 smd rect (at -2.129 -0.75) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -2.129 -1.25) (size 0.29 1.208) (layers Top F.Paste F.Mask)
      (net 15 "Net-(U1-Pad1)") (solder_mask_margin 0.1016))
  )

  (module imu:R0805 (layer Top) (tedit 5DCDEBD1) (tstamp 5DC8EB5B)
    (at 149.479 108.6104 270)
    (descr "<b>RESISTOR</b><p>\nchip")
    (path /5FC72806)
    (fp_text reference U6 (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -2 -1) (xy 2 -1) (xy 2 1) (xy -2 1)) (layer F.CrtYd) (width 0.1))
    (pad 2 smd rect (at 0.85 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.85 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 6 "Net-(R1-Pad1)") (solder_mask_margin 0.1016))
  )

  (module imu:R0805 (layer Top) (tedit 5DCDEBD1) (tstamp 5DC8EB69)
    (at 151.7396 108.585 270)
    (descr "<b>RESISTOR</b><p>\nchip")
    (path /8EFFCFBB)
    (fp_text reference U7 (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 270) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -2 -1) (xy 2 -1) (xy 2 1) (xy -2 1)) (layer F.CrtYd) (width 0.1))
    (pad 2 smd rect (at 0.85 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 1 smd rect (at -0.85 0 270) (size 1.3 1.5) (layers Top F.Paste F.Mask)
      (net 5 "Net-(R2-Pad1)") (solder_mask_margin 0.1016))
  )

  (module imu:MA04-1 locked (layer Top) (tedit 5DCDED3B) (tstamp 5DC8EB77)
    (at 156.083 104.902 90)
    (descr "<b>PIN HEADER</b>")
    (path /4C9F70DA)
    (fp_text reference U8 (at 0 0 90) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_text value "" (at 0 0 90) (layer F.SilkS)
      (effects (font (size 1.27 1.27) (thickness 0.15)))
    )
    (fp_poly (pts (xy -5 -1.75) (xy 5 -1.75) (xy 5 1.75) (xy -5 1.75)) (layer F.CrtYd) (width 0.1))
    (fp_poly (pts (xy -5 -1.75) (xy 5 -1.75) (xy 5 1.75) (xy -5 1.75)) (layer B.CrtYd) (width 0.1))
    (pad 1 thru_hole oval (at -3.81 0 180) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
      (net 2 VDD) (solder_mask_margin 0.1016))
    (pad 2 thru_hole oval (at -1.27 0 180) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
      (net 4 /SCL) (solder_mask_margin 0.1016))
    (pad 3 thru_hole oval (at 1.27 0 180) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
      (net 3 /SDA) (solder_mask_margin 0.1016))
    (pad 4 thru_hole oval (at 3.81 0 180) (size 3.048 1.524) (drill 1.016) (layers *.Cu *.Mask)
      (net 1 GND) (solder_mask_margin 0.1016))
  )

  (gr_line (start 138.2522 111.9378) (end 138.2522 98.0694) (layer Edge.Cuts) (width 0.4064) (tstamp 1CAD9470))
  (gr_line (start 138.2522 98.0694) (end 158.75 98.0694) (layer Edge.Cuts) (width 0.4064) (tstamp 1CAD8750))
  (gr_line (start 158.75 98.0694) (end 158.75 111.9378) (layer Edge.Cuts) (width 0.4064) (tstamp 1CAD8CF0))
  (gr_line (start 158.75 111.9378) (end 138.2522 111.9378) (layer Edge.Cuts) (width 0.4064) (tstamp 1CAD9BF0))

)
