// File: bug_1835797.v
// Generated by MyHDL 0.11.42
// Date: Sun Jun 18 18:40:39 2023


`timescale 1ns/10ps

module bug_1835797 (

);
// Docstring in the middle.
// 
//     





initial begin: BUG_1835797_LOGIC
    reg signed [7-1:0] v;
    v = 0;
    // Wrongly placed docstring
    # 10;
    $write("%0d", -15);
    $write("\n");
    $write("%0d", 45);
    $write("\n");
end

endmodule
