---
# The MLONMCU_HOME is filled in automatically when creating the environment
home: "{{ home_dir }}"
logging:
  level: DEBUG
  to_file: false
  rotate: false
cleanup:
  auto: true
  keep: 10
# Default locations for certain directoriescan be changed here
# Non-absolute paths will always be threated relative to the MLONMCU_HOME
paths:
  # Where the dependencies are downloaded and installed
  deps: deps
  # If logging to file is used keep logs in this directory
  logs: logs
  # Location where reports and artifacts are written to
  results: results
  # Directory where custom extensions can be integrated
  plugins: plugins
  # Directory for intermediate build products, should be located on a large enough drive
  temp: temp
  # A collection of models which will be used to look for models
  # The paths will be checked in the order defined here stopping at the first match
  # Non-existant paths will be skipped without throwing an error
  models:
    - "{{ home_dir }}/models"
    - "{{ config_dir }}/models"
# Here default clone_urls
repos:
  tensorflow:  # TODO: rename to tflite-micro?
    url: "https://github.com/tensorflow/tflite-micro.git"
    ref: 19aaea85e4679a9a2f265e07ba190ac5ea4d3766
    options:
      single_branch: true
  tvm:
    url: "https://github.com/apache/tvm.git"
    # ref: v0.17.0
    ref: 513c2be0c3b853a3b77de729f0ea75d448ee3c37  # last commit before microtvm removal
    options:
      recursive: true
      submodules:
        - 3rdparty/dlpack
        - 3rdparty/dmlc-core
        - 3rdparty/libbacktrace
        - 3rdparty/rang
  muriscvnn:
    url: "https://github.com/tum-ei-eda/muriscv-nn.git"
    ref: cec46aa94277417b3cb48bdb0dcd783abbe670da
  etiss:
    url: "https://github.com/danielschloms/etiss.git"
    ref: 69e4b230ef5e76387a574917e22062036f494efe  # daniel-dev
  spike:
    url: "https://github.com/riscv-software-src/riscv-isa-sim.git"
    ref: 0bc176b3fca43560b9e8586cdbc41cfde073e17a
  spikepk:
    url: "https://github.com/riscv-software-src/riscv-pk.git"
    ref: 7e9b671c0415dfd7b562ac934feb9380075d4aa2
  cmsis:
    url: "https://github.com/ARM-software/CMSIS_5.git"
    ref: a75f01746df18bb5b929dfb8dc6c9407fac3a0f3
    options:
      single_branch: true
      # Shallow clone could save 200MB clone size, but not really possible with commit
      # shallow: true
  cmsisnn:
    url: "https://github.com/ARM-software/CMSIS-NN.git"
    ref: v6.0.0
  mlif:
    url: "https://github.com/tum-ei-eda/mlonmcu-sw.git"
    ref: 3d950d03143644b48e69e22e0ce0fa4b340e1c7a
  microtvm_etiss:
    url: "https://github.com/PhilippvK/microtvm-etiss-template.git"
    ref: b1e53bdae24bb35e53d7cdad2917a9090f7fa933
  microtvm_spike:
    url: "https://github.com/PhilippvK/microtvm-spike-template.git"
    ref: ffba460345f5b8682e2a6cb315699ff872c6221e
  tflite_pack:
    url: "https://github.com/tum-ei-eda/tflite-pack.git"
    ref: 2d31cafc941d3889b042af9c0a72b5f768ac4606
  vicuna:
    url: "https://github.com/vproc/vicuna.git"
    ref: c1484ec8fa9f1106505a4ca246af39a66420a1d0
  vicuna2:
    url: "https://github.com/vproc/vicuna2_tinyml_benchmarking.git"
    ref: 81b91a89e249e7c40ad45615b3917f040ae18701
  verilator:
    url: "https://github.com/verilator/verilator"
    # ref: tags/v4.210
    # ref: tags/v4.222
    ref: tags/v5.030
  dtc:
    url: "https://github.com/dgibson/dtc.git"
    ref: main
  embench:
    url: "https://github.com/embench/embench-iot.git"
    ref: master
  taclebench:
    url: "https://github.com/tacle/tacle-bench.git"
    ref: master
  polybench:
    url: "https://github.com/PhilippvK/PolyBenchC-4.2.1.git"
    ref: fixes
  mibench:
    url: "https://github.com/embecosm/mibench.git"
    ref: master
  srecord:
    url: "https://github.com/sierrafoxtrot/srecord.git"
    ref: master

# Here all supported frameworks with their specific features are defined
# Optionally disable unwanted or incomatible backends or features here
# The configured defaults are used if no backend was specified in the command line options
frameworks:
  default: tvm
  tflm:
    enabled: true
    backends:
      default: tflmi
      tflmi:
        enabled: true
        features:
          debug_arena: true
    features:
      muriscvnn: true
      cmsisnn: true
  tvm:
    enabled: true
    backends:
      default: tvmaotplus
      tvmrt:
        enabled: true
        features:
          debug_arena: true
          disable_legalize: false
          autotuned: true
      tvmllvm:
        enabled: true
        features:
          debug_arena: true
          disable_legalize: false
          autotuned: true
      tvmaot:
        enabled: true
        features:
          debug_arena: true
          unpacked_api: true
          usmp: true
          disable_legalize: false
          autotuned: true
      tvmaotplus:
        enabled: true
        features:
          debug_arena: true
          disable_legalize: false
          autotuned: true
    features: []
    # features:
    #   muriscvnnbyoc: true
    #   cmsisnnbyoc: true
# Some frontends are eperimental and therefore disabled here
# Features like packing are only available in certain environments
#
frontends:
  tflite:
    enabled: true
    features:
      validate: true
      visualize: true
      split_layers: true
  relay:
    enabled: true
    features:
      relayviz: true
  example:
    enabled: true
  embench:
    enabled: true
  taclebench:
    enabled: true
  polybench:
    enabled: true
  coremark:
    enabled: true
  mathis:
    enabled: true
  dhrystone:
    enabled: true
  mibench:
    enabled: true
# Some targets/platforms support multiple toolchains
toolchains:
  gcc: true
  llvm: true
platforms:
  mlif:
    enabled: true
    features:
      debug: true
      validate: true
  tvm:
    enabled: true
    features:
      benchmark: true
      tvm_rpc: true
      autotvm: true
      tvm_profile: true
  microtvm:
    enabled: true
    features:
      autotvm: true
      benchmark: true
      tvm_profile: true
# List of supported targets in the environment
targets:
  default: etiss
  host_x86:
    enabled: true
    features:
      gdbserver: true
  etiss:
    enabled: true
    features:
      gdbserver: true
      etissdbg: true
      trace: true
      log_instrs: true
      vext: true
  spike:
    enabled: true
    features:
      vext: true
      pext: false
      cachesim: true
      log_instrs: true
  vicuna:
    enabled: true
    features:
      vext: true
  vicuna2:
    enabled: true
    features:
      vext: true
  microtvm_host:
    enabled: true
  microtvm_spike:
    enabled: true
  microtvm_etiss:
    enabled: true
  tvm_cpu:
    enabled: true
postprocesses:
  use:
  # - detailed_cycles
  # - average_cycles
  # - filter_cols
  # - features2cols
  # - config2cols
  # - bytes2kb
  # - visualize
# This is where further options such as specific versions of dependencies can be set in the furture
vars:
  allow_extensions: false
  runs_per_stage: true
  # tvm.make_tool: "ninja"
  # llvm.version: "16.0.0"
  llvm.dl_url: "https://github.com/PhilippvK/riscv-tools/releases/download/llvm_19.1.1/clang+llvm-19.1.1-x86_64-linux-gnu-ubuntu-{{ ubuntu_version if ubuntu_version is defined else '20.04'}}.tar.xz"  # TODO: LLVM 20
  riscv_gcc_rv32.dl_url: "https://github.com/PhilippvK/riscv-tools/releases/download/gnu_2024.09.03_gcc14/riscv32-unknown-elf-ubuntu-{{ ubuntu_version if ubuntu_version is defined else '20.04'}}-rv32im_zicsr_zifencei_ilp32.tar.xz"  # TODO: GCC 14+
  riscv_gcc_rv32.dl_url_vext: "https://github.com/PhilippvK/riscv-tools/releases/download/gnu_2024.09.03_gcc14/riscv32-unknown-elf-ubuntu-{{ ubuntu_version if ubuntu_version is defined else '20.04'}}-rv32im_zicsr_zifencei_zve32x_ilp32.tar.xz"  # TODO: GCC 14+
  riscv_gcc_multilib.dl_url: "https://github.com/PhilippvK/riscv-tools/releases/download/gnu_2024.09.03_gcc14/riscv64-unknown-elf-ubuntu-{{ ubuntu_version if ubuntu_version is defined else '20.04'}}-multilib_default.tar.xz"
  # TODO: f, zve32f, zhf, zvfh
  # TODO: vicuna2 target, vicuna2 configs etc.
  spike.keep_build_dir: false
  etiss.keep_build_dir: false
  spikepk.enable_rv32: true
  spikepk.enable_rv64: false
  spikepk_rv32.default_arch: rv32im_zicsr_zifencei
  spikepk_rv32.default_abi: ilp32
  etiss_rv32.fpu: none
  etiss_rv32.compressed: false
  etiss_rv32.atomic: false
  etiss_rv32.cpu_arch: RV32IMACFDV
  spike_rv32.fpu: none
  spike_rv32.compressed: false
  spike_rv32.atomic: false
flags: {}
