#ifndef __MT_REGS_H
#define __MT_REGS_H

#include "pub_tool_basics.h"
#include "pub_tool_guest.h"

struct Reg {
   UShort offset;
   UShort size;
   const HChar* name;
};

#define DEFINE_REG(name)                               \
   {                                                   \
      offsetof(VexGuestArchState, name),               \
          sizeof(((VexGuestArchState*)0)->name), #name \
   }

#define DEFINE_SUBREG(name, offset, type, alias)                      \
   {                                                                  \
      offsetof(VexGuestArchState, name) + offset, sizeof(type), alias \
   }

static const struct Reg regs[] = {
#if defined(VGA_x86)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_SUBREG(guest_EAX, 0, UInt, "eax"),
    DEFINE_SUBREG(guest_EAX, 0, UShort, "ax"),
    DEFINE_SUBREG(guest_EAX, 0, UChar, "al"),
    DEFINE_SUBREG(guest_EAX, 1, UChar, "ah"),
    DEFINE_SUBREG(guest_ECX, 0, UInt, "ecx"),
    DEFINE_SUBREG(guest_ECX, 0, UShort, "cx"),
    DEFINE_SUBREG(guest_ECX, 0, UChar, "cl"),
    DEFINE_SUBREG(guest_ECX, 1, UChar, "ch"),
    DEFINE_SUBREG(guest_EDX, 0, UInt, "edx"),
    DEFINE_SUBREG(guest_EDX, 0, UShort, "dx"),
    DEFINE_SUBREG(guest_EDX, 0, UChar, "dl"),
    DEFINE_SUBREG(guest_EDX, 1, UChar, "dh"),
    DEFINE_SUBREG(guest_EBX, 0, UInt, "ebx"),
    DEFINE_SUBREG(guest_EBX, 0, UShort, "bx"),
    DEFINE_SUBREG(guest_EBX, 0, UChar, "bl"),
    DEFINE_SUBREG(guest_EBX, 1, UChar, "bh"),
    DEFINE_SUBREG(guest_ESP, 0, UInt, "esp"),
    DEFINE_SUBREG(guest_ESP, 0, UShort, "sp"),
    DEFINE_SUBREG(guest_EBP, 0, UInt, "ebp"),
    DEFINE_SUBREG(guest_EBP, 0, UShort, "bp"),
    DEFINE_SUBREG(guest_ESI, 0, UInt, "esi"),
    DEFINE_SUBREG(guest_ESI, 0, UShort, "si"),
    DEFINE_SUBREG(guest_EDI, 0, UInt, "edi"),
    DEFINE_SUBREG(guest_EDI, 0, UShort, "di"),
    DEFINE_REG(guest_CC_OP),
    DEFINE_REG(guest_CC_DEP1),
    DEFINE_REG(guest_CC_DEP2),
    DEFINE_REG(guest_CC_NDEP),
    DEFINE_REG(guest_DFLAG),
    DEFINE_REG(guest_IDFLAG),
    DEFINE_REG(guest_ACFLAG),
    DEFINE_SUBREG(guest_EIP, 0, UInt, "eip"),
    DEFINE_SUBREG(guest_EIP, 0, UShort, "ip"),
    DEFINE_REG(guest_FPREG),
    DEFINE_REG(guest_FPTAG),
    DEFINE_REG(guest_FPROUND),
    DEFINE_REG(guest_FC3210),
    DEFINE_REG(guest_FTOP),
    DEFINE_REG(guest_SSEROUND),
    DEFINE_REG(guest_XMM0),
    DEFINE_REG(guest_XMM1),
    DEFINE_REG(guest_XMM2),
    DEFINE_REG(guest_XMM3),
    DEFINE_REG(guest_XMM4),
    DEFINE_REG(guest_XMM5),
    DEFINE_REG(guest_XMM6),
    DEFINE_REG(guest_XMM7),
    DEFINE_REG(guest_CS),
    DEFINE_REG(guest_DS),
    DEFINE_REG(guest_ES),
    DEFINE_REG(guest_FS),
    DEFINE_REG(guest_GS),
    DEFINE_REG(guest_SS),
    DEFINE_REG(guest_LDT),
    DEFINE_REG(guest_GDT),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_SC_CLASS),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_SETC),
    DEFINE_REG(padding1),
    DEFINE_REG(padding2),
#endif
#if defined(VGA_amd64)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(pad0),
    DEFINE_SUBREG(guest_RAX, 0, ULong, "rax"),
    DEFINE_SUBREG(guest_RAX, 0, UInt, "eax"),
    DEFINE_SUBREG(guest_RAX, 0, UShort, "ax"),
    DEFINE_SUBREG(guest_RAX, 0, UChar, "al"),
    DEFINE_SUBREG(guest_RAX, 1, UChar, "ah"),
    DEFINE_SUBREG(guest_RCX, 0, ULong, "rcx"),
    DEFINE_SUBREG(guest_RCX, 0, UInt, "ecx"),
    DEFINE_SUBREG(guest_RCX, 0, UShort, "cx"),
    DEFINE_SUBREG(guest_RCX, 0, UChar, "cl"),
    DEFINE_SUBREG(guest_RCX, 1, UChar, "ch"),
    DEFINE_SUBREG(guest_RDX, 0, ULong, "rdx"),
    DEFINE_SUBREG(guest_RDX, 0, UInt, "edx"),
    DEFINE_SUBREG(guest_RDX, 0, UShort, "dx"),
    DEFINE_SUBREG(guest_RDX, 0, UChar, "dl"),
    DEFINE_SUBREG(guest_RDX, 1, UChar, "dh"),
    DEFINE_SUBREG(guest_RBX, 0, ULong, "rbx"),
    DEFINE_SUBREG(guest_RBX, 0, UInt, "ebx"),
    DEFINE_SUBREG(guest_RBX, 0, UShort, "bx"),
    DEFINE_SUBREG(guest_RBX, 0, UChar, "bl"),
    DEFINE_SUBREG(guest_RBX, 1, UChar, "bh"),
    DEFINE_SUBREG(guest_RSP, 0, ULong, "rsp"),
    DEFINE_SUBREG(guest_RSP, 0, UInt, "esp"),
    DEFINE_SUBREG(guest_RSP, 0, UShort, "sp"),
    DEFINE_SUBREG(guest_RSP, 0, UChar, "spl"),
    DEFINE_SUBREG(guest_RBP, 0, ULong, "rbp"),
    DEFINE_SUBREG(guest_RBP, 0, UInt, "ebp"),
    DEFINE_SUBREG(guest_RBP, 0, UShort, "bp"),
    DEFINE_SUBREG(guest_RBP, 0, UChar, "bpl"),
    DEFINE_SUBREG(guest_RSI, 0, ULong, "rsi"),
    DEFINE_SUBREG(guest_RSI, 0, UInt, "esi"),
    DEFINE_SUBREG(guest_RSI, 0, UShort, "si"),
    DEFINE_SUBREG(guest_RSI, 0, UChar, "sil"),
    DEFINE_SUBREG(guest_RDI, 0, ULong, "rdi"),
    DEFINE_SUBREG(guest_RDI, 0, UInt, "edi"),
    DEFINE_SUBREG(guest_RDI, 0, UShort, "di"),
    DEFINE_SUBREG(guest_RDI, 0, UChar, "dil"),
    DEFINE_SUBREG(guest_R8, 0, ULong, "r8"),
    DEFINE_SUBREG(guest_R8, 0, UInt, "r8d"),
    DEFINE_SUBREG(guest_R8, 0, UShort, "r8w"),
    DEFINE_SUBREG(guest_R8, 0, UChar, "r8b"),
    DEFINE_SUBREG(guest_R9, 0, ULong, "r9"),
    DEFINE_SUBREG(guest_R9, 0, UInt, "r9d"),
    DEFINE_SUBREG(guest_R9, 0, UShort, "r9w"),
    DEFINE_SUBREG(guest_R9, 0, UChar, "r9b"),
    DEFINE_SUBREG(guest_R10, 0, ULong, "r10"),
    DEFINE_SUBREG(guest_R10, 0, UInt, "r10d"),
    DEFINE_SUBREG(guest_R10, 0, UShort, "r10w"),
    DEFINE_SUBREG(guest_R10, 0, UChar, "r10b"),
    DEFINE_SUBREG(guest_R11, 0, ULong, "r11"),
    DEFINE_SUBREG(guest_R11, 0, UInt, "r11d"),
    DEFINE_SUBREG(guest_R11, 0, UShort, "r11w"),
    DEFINE_SUBREG(guest_R11, 0, UChar, "r11b"),
    DEFINE_SUBREG(guest_R12, 0, ULong, "r12"),
    DEFINE_SUBREG(guest_R12, 0, UInt, "r12d"),
    DEFINE_SUBREG(guest_R12, 0, UShort, "r12w"),
    DEFINE_SUBREG(guest_R12, 0, UChar, "r12b"),
    DEFINE_SUBREG(guest_R13, 0, ULong, "r13"),
    DEFINE_SUBREG(guest_R13, 0, UInt, "r13d"),
    DEFINE_SUBREG(guest_R13, 0, UShort, "r13w"),
    DEFINE_SUBREG(guest_R13, 0, UChar, "r13b"),
    DEFINE_SUBREG(guest_R14, 0, ULong, "r14"),
    DEFINE_SUBREG(guest_R14, 0, UInt, "r14d"),
    DEFINE_SUBREG(guest_R14, 0, UShort, "r14w"),
    DEFINE_SUBREG(guest_R14, 0, UChar, "r14b"),
    DEFINE_SUBREG(guest_R15, 0, ULong, "r15"),
    DEFINE_SUBREG(guest_R15, 0, UInt, "r15d"),
    DEFINE_SUBREG(guest_R15, 0, UShort, "r15w"),
    DEFINE_SUBREG(guest_R15, 0, UChar, "r15b"),
    DEFINE_REG(guest_CC_OP),
    DEFINE_REG(guest_CC_DEP1),
    DEFINE_REG(guest_CC_DEP2),
    DEFINE_REG(guest_CC_NDEP),
    DEFINE_REG(guest_DFLAG),
    DEFINE_SUBREG(guest_RIP, 0, ULong, "rip"),
    DEFINE_SUBREG(guest_RIP, 0, UInt, "eip"),
    DEFINE_SUBREG(guest_RIP, 0, UShort, "ip"),
    DEFINE_REG(guest_ACFLAG),
    DEFINE_REG(guest_IDFLAG),
    DEFINE_REG(guest_FS_CONST),
    DEFINE_REG(guest_SSEROUND),
    DEFINE_REG(guest_YMM0),
    DEFINE_REG(guest_YMM1),
    DEFINE_REG(guest_YMM2),
    DEFINE_REG(guest_YMM3),
    DEFINE_REG(guest_YMM4),
    DEFINE_REG(guest_YMM5),
    DEFINE_REG(guest_YMM6),
    DEFINE_REG(guest_YMM7),
    DEFINE_REG(guest_YMM8),
    DEFINE_REG(guest_YMM9),
    DEFINE_REG(guest_YMM10),
    DEFINE_REG(guest_YMM11),
    DEFINE_REG(guest_YMM12),
    DEFINE_REG(guest_YMM13),
    DEFINE_REG(guest_YMM14),
    DEFINE_REG(guest_YMM15),
    DEFINE_REG(guest_YMM16),
    DEFINE_REG(guest_FTOP),
    DEFINE_REG(pad1),
    DEFINE_REG(guest_FPREG),
    DEFINE_REG(guest_FPTAG),
    DEFINE_REG(guest_FPROUND),
    DEFINE_REG(guest_FC3210),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(guest_SETC),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_SC_CLASS),
    DEFINE_REG(guest_GS_CONST),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(pad3),
#endif
#if defined(VGA_ppc64be)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(pad0),
    DEFINE_REG(guest_GPR0),
    DEFINE_REG(guest_GPR1),
    DEFINE_REG(guest_GPR2),
    DEFINE_REG(guest_GPR3),
    DEFINE_REG(guest_GPR4),
    DEFINE_REG(guest_GPR5),
    DEFINE_REG(guest_GPR6),
    DEFINE_REG(guest_GPR7),
    DEFINE_REG(guest_GPR8),
    DEFINE_REG(guest_GPR9),
    DEFINE_REG(guest_GPR10),
    DEFINE_REG(guest_GPR11),
    DEFINE_REG(guest_GPR12),
    DEFINE_REG(guest_GPR13),
    DEFINE_REG(guest_GPR14),
    DEFINE_REG(guest_GPR15),
    DEFINE_REG(guest_GPR16),
    DEFINE_REG(guest_GPR17),
    DEFINE_REG(guest_GPR18),
    DEFINE_REG(guest_GPR19),
    DEFINE_REG(guest_GPR20),
    DEFINE_REG(guest_GPR21),
    DEFINE_REG(guest_GPR22),
    DEFINE_REG(guest_GPR23),
    DEFINE_REG(guest_GPR24),
    DEFINE_REG(guest_GPR25),
    DEFINE_REG(guest_GPR26),
    DEFINE_REG(guest_GPR27),
    DEFINE_REG(guest_GPR28),
    DEFINE_REG(guest_GPR29),
    DEFINE_REG(guest_GPR30),
    DEFINE_REG(guest_GPR31),
    DEFINE_REG(guest_VSR0),
    DEFINE_REG(guest_VSR1),
    DEFINE_REG(guest_VSR2),
    DEFINE_REG(guest_VSR3),
    DEFINE_REG(guest_VSR4),
    DEFINE_REG(guest_VSR5),
    DEFINE_REG(guest_VSR6),
    DEFINE_REG(guest_VSR7),
    DEFINE_REG(guest_VSR8),
    DEFINE_REG(guest_VSR9),
    DEFINE_REG(guest_VSR10),
    DEFINE_REG(guest_VSR11),
    DEFINE_REG(guest_VSR12),
    DEFINE_REG(guest_VSR13),
    DEFINE_REG(guest_VSR14),
    DEFINE_REG(guest_VSR15),
    DEFINE_REG(guest_VSR16),
    DEFINE_REG(guest_VSR17),
    DEFINE_REG(guest_VSR18),
    DEFINE_REG(guest_VSR19),
    DEFINE_REG(guest_VSR20),
    DEFINE_REG(guest_VSR21),
    DEFINE_REG(guest_VSR22),
    DEFINE_REG(guest_VSR23),
    DEFINE_REG(guest_VSR24),
    DEFINE_REG(guest_VSR25),
    DEFINE_REG(guest_VSR26),
    DEFINE_REG(guest_VSR27),
    DEFINE_REG(guest_VSR28),
    DEFINE_REG(guest_VSR29),
    DEFINE_REG(guest_VSR30),
    DEFINE_REG(guest_VSR31),
    DEFINE_REG(guest_VSR32),
    DEFINE_REG(guest_VSR33),
    DEFINE_REG(guest_VSR34),
    DEFINE_REG(guest_VSR35),
    DEFINE_REG(guest_VSR36),
    DEFINE_REG(guest_VSR37),
    DEFINE_REG(guest_VSR38),
    DEFINE_REG(guest_VSR39),
    DEFINE_REG(guest_VSR40),
    DEFINE_REG(guest_VSR41),
    DEFINE_REG(guest_VSR42),
    DEFINE_REG(guest_VSR43),
    DEFINE_REG(guest_VSR44),
    DEFINE_REG(guest_VSR45),
    DEFINE_REG(guest_VSR46),
    DEFINE_REG(guest_VSR47),
    DEFINE_REG(guest_VSR48),
    DEFINE_REG(guest_VSR49),
    DEFINE_REG(guest_VSR50),
    DEFINE_REG(guest_VSR51),
    DEFINE_REG(guest_VSR52),
    DEFINE_REG(guest_VSR53),
    DEFINE_REG(guest_VSR54),
    DEFINE_REG(guest_VSR55),
    DEFINE_REG(guest_VSR56),
    DEFINE_REG(guest_VSR57),
    DEFINE_REG(guest_VSR58),
    DEFINE_REG(guest_VSR59),
    DEFINE_REG(guest_VSR60),
    DEFINE_REG(guest_VSR61),
    DEFINE_REG(guest_VSR62),
    DEFINE_REG(guest_VSR63),
    DEFINE_REG(guest_CIA),
    DEFINE_REG(guest_LR),
    DEFINE_REG(guest_CTR),
    DEFINE_REG(guest_XER_SO),
    DEFINE_REG(guest_XER_OV),
    DEFINE_REG(guest_XER_OV32),
    DEFINE_REG(guest_XER_CA),
    DEFINE_REG(guest_XER_CA32),
    DEFINE_REG(guest_XER_BC),
    DEFINE_REG(guest_CR0_321),
    DEFINE_REG(guest_CR0_0),
    DEFINE_REG(guest_CR1_321),
    DEFINE_REG(guest_CR1_0),
    DEFINE_REG(guest_CR2_321),
    DEFINE_REG(guest_CR2_0),
    DEFINE_REG(guest_CR3_321),
    DEFINE_REG(guest_CR3_0),
    DEFINE_REG(guest_CR4_321),
    DEFINE_REG(guest_CR4_0),
    DEFINE_REG(guest_CR5_321),
    DEFINE_REG(guest_CR5_0),
    DEFINE_REG(guest_CR6_321),
    DEFINE_REG(guest_CR6_0),
    DEFINE_REG(guest_CR7_321),
    DEFINE_REG(guest_CR7_0),
    DEFINE_REG(guest_FPROUND),
    DEFINE_REG(guest_DFPROUND),
    DEFINE_REG(guest_C_FPCC),
    DEFINE_REG(pad2),
    DEFINE_REG(pad3),
    DEFINE_REG(pad4),
    DEFINE_REG(guest_VRSAVE),
    DEFINE_REG(guest_VSCR),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(padding),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_NRADDR_GPR2),
    DEFINE_REG(guest_REDIR_SP),
    DEFINE_REG(guest_REDIR_STACK),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_SPRG3_RO),
    DEFINE_REG(guest_TFHAR),
    DEFINE_REG(guest_TEXASR),
    DEFINE_REG(guest_TFIAR),
    DEFINE_REG(guest_PPR),
    DEFINE_REG(guest_TEXASRU),
    DEFINE_REG(guest_PSPB),
    DEFINE_REG(guest_DSCR),
    DEFINE_REG(guest_ACC_0_r0),
    DEFINE_REG(guest_ACC_0_r1),
    DEFINE_REG(guest_ACC_0_r2),
    DEFINE_REG(guest_ACC_0_r3),
    DEFINE_REG(guest_ACC_1_r0),
    DEFINE_REG(guest_ACC_1_r1),
    DEFINE_REG(guest_ACC_1_r2),
    DEFINE_REG(guest_ACC_1_r3),
    DEFINE_REG(guest_ACC_2_r0),
    DEFINE_REG(guest_ACC_2_r1),
    DEFINE_REG(guest_ACC_2_r2),
    DEFINE_REG(guest_ACC_2_r3),
    DEFINE_REG(guest_ACC_3_r0),
    DEFINE_REG(guest_ACC_3_r1),
    DEFINE_REG(guest_ACC_3_r2),
    DEFINE_REG(guest_ACC_3_r3),
    DEFINE_REG(guest_ACC_4_r0),
    DEFINE_REG(guest_ACC_4_r1),
    DEFINE_REG(guest_ACC_4_r2),
    DEFINE_REG(guest_ACC_4_r3),
    DEFINE_REG(guest_ACC_5_r0),
    DEFINE_REG(guest_ACC_5_r1),
    DEFINE_REG(guest_ACC_5_r2),
    DEFINE_REG(guest_ACC_5_r3),
    DEFINE_REG(guest_ACC_6_r0),
    DEFINE_REG(guest_ACC_6_r1),
    DEFINE_REG(guest_ACC_6_r2),
    DEFINE_REG(guest_ACC_6_r3),
    DEFINE_REG(guest_ACC_7_r0),
    DEFINE_REG(guest_ACC_7_r1),
    DEFINE_REG(guest_ACC_7_r2),
    DEFINE_REG(guest_ACC_7_r3),
    DEFINE_REG(guest_syscall_flag),
    DEFINE_REG(padding1),
    DEFINE_REG(padding2),
    DEFINE_REG(padding3),
#endif
#if defined(VGA_ppc64le)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(pad0),
    DEFINE_REG(guest_GPR0),
    DEFINE_REG(guest_GPR1),
    DEFINE_REG(guest_GPR2),
    DEFINE_REG(guest_GPR3),
    DEFINE_REG(guest_GPR4),
    DEFINE_REG(guest_GPR5),
    DEFINE_REG(guest_GPR6),
    DEFINE_REG(guest_GPR7),
    DEFINE_REG(guest_GPR8),
    DEFINE_REG(guest_GPR9),
    DEFINE_REG(guest_GPR10),
    DEFINE_REG(guest_GPR11),
    DEFINE_REG(guest_GPR12),
    DEFINE_REG(guest_GPR13),
    DEFINE_REG(guest_GPR14),
    DEFINE_REG(guest_GPR15),
    DEFINE_REG(guest_GPR16),
    DEFINE_REG(guest_GPR17),
    DEFINE_REG(guest_GPR18),
    DEFINE_REG(guest_GPR19),
    DEFINE_REG(guest_GPR20),
    DEFINE_REG(guest_GPR21),
    DEFINE_REG(guest_GPR22),
    DEFINE_REG(guest_GPR23),
    DEFINE_REG(guest_GPR24),
    DEFINE_REG(guest_GPR25),
    DEFINE_REG(guest_GPR26),
    DEFINE_REG(guest_GPR27),
    DEFINE_REG(guest_GPR28),
    DEFINE_REG(guest_GPR29),
    DEFINE_REG(guest_GPR30),
    DEFINE_REG(guest_GPR31),
    DEFINE_REG(guest_VSR0),
    DEFINE_REG(guest_VSR1),
    DEFINE_REG(guest_VSR2),
    DEFINE_REG(guest_VSR3),
    DEFINE_REG(guest_VSR4),
    DEFINE_REG(guest_VSR5),
    DEFINE_REG(guest_VSR6),
    DEFINE_REG(guest_VSR7),
    DEFINE_REG(guest_VSR8),
    DEFINE_REG(guest_VSR9),
    DEFINE_REG(guest_VSR10),
    DEFINE_REG(guest_VSR11),
    DEFINE_REG(guest_VSR12),
    DEFINE_REG(guest_VSR13),
    DEFINE_REG(guest_VSR14),
    DEFINE_REG(guest_VSR15),
    DEFINE_REG(guest_VSR16),
    DEFINE_REG(guest_VSR17),
    DEFINE_REG(guest_VSR18),
    DEFINE_REG(guest_VSR19),
    DEFINE_REG(guest_VSR20),
    DEFINE_REG(guest_VSR21),
    DEFINE_REG(guest_VSR22),
    DEFINE_REG(guest_VSR23),
    DEFINE_REG(guest_VSR24),
    DEFINE_REG(guest_VSR25),
    DEFINE_REG(guest_VSR26),
    DEFINE_REG(guest_VSR27),
    DEFINE_REG(guest_VSR28),
    DEFINE_REG(guest_VSR29),
    DEFINE_REG(guest_VSR30),
    DEFINE_REG(guest_VSR31),
    DEFINE_REG(guest_VSR32),
    DEFINE_REG(guest_VSR33),
    DEFINE_REG(guest_VSR34),
    DEFINE_REG(guest_VSR35),
    DEFINE_REG(guest_VSR36),
    DEFINE_REG(guest_VSR37),
    DEFINE_REG(guest_VSR38),
    DEFINE_REG(guest_VSR39),
    DEFINE_REG(guest_VSR40),
    DEFINE_REG(guest_VSR41),
    DEFINE_REG(guest_VSR42),
    DEFINE_REG(guest_VSR43),
    DEFINE_REG(guest_VSR44),
    DEFINE_REG(guest_VSR45),
    DEFINE_REG(guest_VSR46),
    DEFINE_REG(guest_VSR47),
    DEFINE_REG(guest_VSR48),
    DEFINE_REG(guest_VSR49),
    DEFINE_REG(guest_VSR50),
    DEFINE_REG(guest_VSR51),
    DEFINE_REG(guest_VSR52),
    DEFINE_REG(guest_VSR53),
    DEFINE_REG(guest_VSR54),
    DEFINE_REG(guest_VSR55),
    DEFINE_REG(guest_VSR56),
    DEFINE_REG(guest_VSR57),
    DEFINE_REG(guest_VSR58),
    DEFINE_REG(guest_VSR59),
    DEFINE_REG(guest_VSR60),
    DEFINE_REG(guest_VSR61),
    DEFINE_REG(guest_VSR62),
    DEFINE_REG(guest_VSR63),
    DEFINE_REG(guest_CIA),
    DEFINE_REG(guest_LR),
    DEFINE_REG(guest_CTR),
    DEFINE_REG(guest_XER_SO),
    DEFINE_REG(guest_XER_OV),
    DEFINE_REG(guest_XER_OV32),
    DEFINE_REG(guest_XER_CA),
    DEFINE_REG(guest_XER_CA32),
    DEFINE_REG(guest_XER_BC),
    DEFINE_REG(guest_CR0_321),
    DEFINE_REG(guest_CR0_0),
    DEFINE_REG(guest_CR1_321),
    DEFINE_REG(guest_CR1_0),
    DEFINE_REG(guest_CR2_321),
    DEFINE_REG(guest_CR2_0),
    DEFINE_REG(guest_CR3_321),
    DEFINE_REG(guest_CR3_0),
    DEFINE_REG(guest_CR4_321),
    DEFINE_REG(guest_CR4_0),
    DEFINE_REG(guest_CR5_321),
    DEFINE_REG(guest_CR5_0),
    DEFINE_REG(guest_CR6_321),
    DEFINE_REG(guest_CR6_0),
    DEFINE_REG(guest_CR7_321),
    DEFINE_REG(guest_CR7_0),
    DEFINE_REG(guest_FPROUND),
    DEFINE_REG(guest_DFPROUND),
    DEFINE_REG(guest_C_FPCC),
    DEFINE_REG(pad2),
    DEFINE_REG(pad3),
    DEFINE_REG(pad4),
    DEFINE_REG(guest_VRSAVE),
    DEFINE_REG(guest_VSCR),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(padding),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_NRADDR_GPR2),
    DEFINE_REG(guest_REDIR_SP),
    DEFINE_REG(guest_REDIR_STACK),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_SPRG3_RO),
    DEFINE_REG(guest_TFHAR),
    DEFINE_REG(guest_TEXASR),
    DEFINE_REG(guest_TFIAR),
    DEFINE_REG(guest_PPR),
    DEFINE_REG(guest_TEXASRU),
    DEFINE_REG(guest_PSPB),
    DEFINE_REG(guest_DSCR),
    DEFINE_REG(guest_ACC_0_r0),
    DEFINE_REG(guest_ACC_0_r1),
    DEFINE_REG(guest_ACC_0_r2),
    DEFINE_REG(guest_ACC_0_r3),
    DEFINE_REG(guest_ACC_1_r0),
    DEFINE_REG(guest_ACC_1_r1),
    DEFINE_REG(guest_ACC_1_r2),
    DEFINE_REG(guest_ACC_1_r3),
    DEFINE_REG(guest_ACC_2_r0),
    DEFINE_REG(guest_ACC_2_r1),
    DEFINE_REG(guest_ACC_2_r2),
    DEFINE_REG(guest_ACC_2_r3),
    DEFINE_REG(guest_ACC_3_r0),
    DEFINE_REG(guest_ACC_3_r1),
    DEFINE_REG(guest_ACC_3_r2),
    DEFINE_REG(guest_ACC_3_r3),
    DEFINE_REG(guest_ACC_4_r0),
    DEFINE_REG(guest_ACC_4_r1),
    DEFINE_REG(guest_ACC_4_r2),
    DEFINE_REG(guest_ACC_4_r3),
    DEFINE_REG(guest_ACC_5_r0),
    DEFINE_REG(guest_ACC_5_r1),
    DEFINE_REG(guest_ACC_5_r2),
    DEFINE_REG(guest_ACC_5_r3),
    DEFINE_REG(guest_ACC_6_r0),
    DEFINE_REG(guest_ACC_6_r1),
    DEFINE_REG(guest_ACC_6_r2),
    DEFINE_REG(guest_ACC_6_r3),
    DEFINE_REG(guest_ACC_7_r0),
    DEFINE_REG(guest_ACC_7_r1),
    DEFINE_REG(guest_ACC_7_r2),
    DEFINE_REG(guest_ACC_7_r3),
    DEFINE_REG(guest_syscall_flag),
    DEFINE_REG(padding1),
    DEFINE_REG(padding2),
    DEFINE_REG(padding3),
#endif
#if defined(VGA_arm)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(guest_R0),
    DEFINE_REG(guest_R1),
    DEFINE_REG(guest_R2),
    DEFINE_REG(guest_R3),
    DEFINE_REG(guest_R4),
    DEFINE_REG(guest_R5),
    DEFINE_REG(guest_R6),
    DEFINE_REG(guest_R7),
    DEFINE_REG(guest_R8),
    DEFINE_REG(guest_R9),
    DEFINE_REG(guest_R10),
    DEFINE_REG(guest_R11),
    DEFINE_REG(guest_R12),
    DEFINE_REG(guest_R13),
    DEFINE_REG(guest_R14),
    DEFINE_REG(guest_R15T),
    DEFINE_REG(guest_CC_OP),
    DEFINE_REG(guest_CC_DEP1),
    DEFINE_REG(guest_CC_DEP2),
    DEFINE_REG(guest_CC_NDEP),
    DEFINE_REG(guest_QFLAG32),
    DEFINE_REG(guest_GEFLAG0),
    DEFINE_REG(guest_GEFLAG1),
    DEFINE_REG(guest_GEFLAG2),
    DEFINE_REG(guest_GEFLAG3),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_D0),
    DEFINE_REG(guest_D1),
    DEFINE_REG(guest_D2),
    DEFINE_REG(guest_D3),
    DEFINE_REG(guest_D4),
    DEFINE_REG(guest_D5),
    DEFINE_REG(guest_D6),
    DEFINE_REG(guest_D7),
    DEFINE_REG(guest_D8),
    DEFINE_REG(guest_D9),
    DEFINE_REG(guest_D10),
    DEFINE_REG(guest_D11),
    DEFINE_REG(guest_D12),
    DEFINE_REG(guest_D13),
    DEFINE_REG(guest_D14),
    DEFINE_REG(guest_D15),
    DEFINE_REG(guest_D16),
    DEFINE_REG(guest_D17),
    DEFINE_REG(guest_D18),
    DEFINE_REG(guest_D19),
    DEFINE_REG(guest_D20),
    DEFINE_REG(guest_D21),
    DEFINE_REG(guest_D22),
    DEFINE_REG(guest_D23),
    DEFINE_REG(guest_D24),
    DEFINE_REG(guest_D25),
    DEFINE_REG(guest_D26),
    DEFINE_REG(guest_D27),
    DEFINE_REG(guest_D28),
    DEFINE_REG(guest_D29),
    DEFINE_REG(guest_D30),
    DEFINE_REG(guest_D31),
    DEFINE_REG(guest_FPSCR),
    DEFINE_REG(guest_TPIDRURO),
    DEFINE_REG(guest_TPIDRURW),
    DEFINE_REG(guest_ITSTATE),
#endif
#if defined(VGA_arm64)
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(pad0),
    DEFINE_REG(guest_X0),
    DEFINE_REG(guest_X1),
    DEFINE_REG(guest_X2),
    DEFINE_REG(guest_X3),
    DEFINE_REG(guest_X4),
    DEFINE_REG(guest_X5),
    DEFINE_REG(guest_X6),
    DEFINE_REG(guest_X7),
    DEFINE_REG(guest_X8),
    DEFINE_REG(guest_X9),
    DEFINE_REG(guest_X10),
    DEFINE_REG(guest_X11),
    DEFINE_REG(guest_X12),
    DEFINE_REG(guest_X13),
    DEFINE_REG(guest_X14),
    DEFINE_REG(guest_X15),
    DEFINE_REG(guest_X16),
    DEFINE_REG(guest_X17),
    DEFINE_REG(guest_X18),
    DEFINE_REG(guest_X19),
    DEFINE_REG(guest_X20),
    DEFINE_REG(guest_X21),
    DEFINE_REG(guest_X22),
    DEFINE_REG(guest_X23),
    DEFINE_REG(guest_X24),
    DEFINE_REG(guest_X25),
    DEFINE_REG(guest_X26),
    DEFINE_REG(guest_X27),
    DEFINE_REG(guest_X28),
    DEFINE_REG(guest_X29),
    DEFINE_REG(guest_X30),
    DEFINE_REG(guest_XSP),
    DEFINE_REG(guest_PC),
    DEFINE_REG(guest_CC_OP),
    DEFINE_REG(guest_CC_DEP1),
    DEFINE_REG(guest_CC_DEP2),
    DEFINE_REG(guest_CC_NDEP),
    DEFINE_REG(guest_TPIDR_EL0),
    DEFINE_REG(guest_Q0),
    DEFINE_REG(guest_Q1),
    DEFINE_REG(guest_Q2),
    DEFINE_REG(guest_Q3),
    DEFINE_REG(guest_Q4),
    DEFINE_REG(guest_Q5),
    DEFINE_REG(guest_Q6),
    DEFINE_REG(guest_Q7),
    DEFINE_REG(guest_Q8),
    DEFINE_REG(guest_Q9),
    DEFINE_REG(guest_Q10),
    DEFINE_REG(guest_Q11),
    DEFINE_REG(guest_Q12),
    DEFINE_REG(guest_Q13),
    DEFINE_REG(guest_Q14),
    DEFINE_REG(guest_Q15),
    DEFINE_REG(guest_Q16),
    DEFINE_REG(guest_Q17),
    DEFINE_REG(guest_Q18),
    DEFINE_REG(guest_Q19),
    DEFINE_REG(guest_Q20),
    DEFINE_REG(guest_Q21),
    DEFINE_REG(guest_Q22),
    DEFINE_REG(guest_Q23),
    DEFINE_REG(guest_Q24),
    DEFINE_REG(guest_Q25),
    DEFINE_REG(guest_Q26),
    DEFINE_REG(guest_Q27),
    DEFINE_REG(guest_Q28),
    DEFINE_REG(guest_Q29),
    DEFINE_REG(guest_Q30),
    DEFINE_REG(guest_Q31),
    DEFINE_REG(guest_QCFLAG),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_FPCR),
    DEFINE_REG(guest_LLSC_SIZE),
    DEFINE_REG(guest_LLSC_ADDR),
    DEFINE_REG(guest_LLSC_DATA_LO64),
    DEFINE_REG(guest_LLSC_DATA_HI64),
    DEFINE_REG(guest_SC_CLASS),
    DEFINE_REG(guest_SETC),
    DEFINE_REG(pad_end_0),
#endif
#if defined(VGA_s390x)
    DEFINE_REG(guest_a0),
    DEFINE_REG(guest_a1),
    DEFINE_REG(guest_a2),
    DEFINE_REG(guest_a3),
    DEFINE_REG(guest_a4),
    DEFINE_REG(guest_a5),
    DEFINE_REG(guest_a6),
    DEFINE_REG(guest_a7),
    DEFINE_REG(guest_a8),
    DEFINE_REG(guest_a9),
    DEFINE_REG(guest_a10),
    DEFINE_REG(guest_a11),
    DEFINE_REG(guest_a12),
    DEFINE_REG(guest_a13),
    DEFINE_REG(guest_a14),
    DEFINE_REG(guest_a15),
    DEFINE_REG(guest_v0),
    DEFINE_REG(guest_v1),
    DEFINE_REG(guest_v2),
    DEFINE_REG(guest_v3),
    DEFINE_REG(guest_v4),
    DEFINE_REG(guest_v5),
    DEFINE_REG(guest_v6),
    DEFINE_REG(guest_v7),
    DEFINE_REG(guest_v8),
    DEFINE_REG(guest_v9),
    DEFINE_REG(guest_v10),
    DEFINE_REG(guest_v11),
    DEFINE_REG(guest_v12),
    DEFINE_REG(guest_v13),
    DEFINE_REG(guest_v14),
    DEFINE_REG(guest_v15),
    DEFINE_REG(guest_v16),
    DEFINE_REG(guest_v17),
    DEFINE_REG(guest_v18),
    DEFINE_REG(guest_v19),
    DEFINE_REG(guest_v20),
    DEFINE_REG(guest_v21),
    DEFINE_REG(guest_v22),
    DEFINE_REG(guest_v23),
    DEFINE_REG(guest_v24),
    DEFINE_REG(guest_v25),
    DEFINE_REG(guest_v26),
    DEFINE_REG(guest_v27),
    DEFINE_REG(guest_v28),
    DEFINE_REG(guest_v29),
    DEFINE_REG(guest_v30),
    DEFINE_REG(guest_v31),
    DEFINE_REG(guest_r0),
    DEFINE_REG(guest_r1),
    DEFINE_REG(guest_r2),
    DEFINE_REG(guest_r3),
    DEFINE_REG(guest_r4),
    DEFINE_REG(guest_r5),
    DEFINE_REG(guest_r6),
    DEFINE_REG(guest_r7),
    DEFINE_REG(guest_r8),
    DEFINE_REG(guest_r9),
    DEFINE_REG(guest_r10),
    DEFINE_REG(guest_r11),
    DEFINE_REG(guest_r12),
    DEFINE_REG(guest_r13),
    DEFINE_REG(guest_r14),
    DEFINE_REG(guest_r15),
    DEFINE_REG(guest_counter),
    DEFINE_REG(guest_fpc),
    DEFINE_REG(unused),
    DEFINE_REG(guest_IA),
    DEFINE_REG(guest_SYSNO),
    DEFINE_REG(guest_CC_OP),
    DEFINE_REG(guest_CC_DEP1),
    DEFINE_REG(guest_CC_DEP2),
    DEFINE_REG(guest_CC_NDEP),
    DEFINE_REG(guest_NRADDR),
    DEFINE_REG(guest_CMSTART),
    DEFINE_REG(guest_CMLEN),
    DEFINE_REG(guest_IP_AT_SYSCALL),
    DEFINE_REG(guest_EMNOTE),
    DEFINE_REG(host_EvC_COUNTER),
    DEFINE_REG(host_EvC_FAILADDR),
    DEFINE_REG(padding),
#endif
};

#endif
