Metadata-Version: 2.1
Name: ipsocgen
Version: 0.1.34
Summary: Generic SoC builder in HDL
Home-page: https://github.com/aignacio/ipsocgen
Author: aignacio (Anderson Ignacio)
Author-email: <anderson@aignacio.com>
Keywords: soc,mpsoc,hdl,verilog,systemverilog,builder
Classifier: Development Status :: 1 - Planning
Classifier: Intended Audience :: Developers
Classifier: Programming Language :: Python :: 3
Classifier: License :: OSI Approved :: MIT License
Classifier: Operating System :: Unix
Classifier: Operating System :: MacOS :: MacOS X
Classifier: Operating System :: Microsoft :: Windows
Description-Content-Type: text/markdown
License-File: LICENSE


# IP SoC Generator

**IP SoC gen** is a framework to generate MP/SoCs with different configurations through a set of masters/slaves for fast
digital design development. To install through pip: 
```bash
pip install --upgrade ipsocgen
```

## Template projects 
In order to get started generating your own designs, check the [template
repository](https://github.com/aignacio/ipsocgen_template) which contains an example of SoC and MPSoC using
[NoX](https://github.com/aignacio/nox)
processor as the main CPU.

## To contribute/develop/extend the work
Please follow the steps below to build the virtual environment and install the dependencies.
```bash
python3 -m venv venv
source venv/bin/activate 
python3 setup.py install
```


