Metadata-Version: 2.1
Name: hdlcomposer
Version: 0.32
Summary: HDL simulation and autoverification made agile
Home-page: https://github.com/bmpenuelas/hdlcomposer
Author: Borja Penuelas
Author-email: bmpenuelas@gmail.com
License: MIT
Keywords: VHDL Verilog simulation verification parse hierarchy
Platform: UNKNOWN
Classifier: Development Status :: 3 - Alpha
Classifier: Programming Language :: Python :: 3
Requires-Dist: vcdvcd

# HDL Composer <img src="/docs/img/icon.png" alt="HDL Composer" width="48px">
### HDL simulation and autoverification made agile

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#### :information_source: Most relevant features:

:star: Automate simulation runs with parameter randomization

:star: Generate stimuli HDL packages

:star: Automate verification of simulation results

:star: Parse HDL and build object-oriented representations of your design

:star: Automatic sources location and compilation

:star: Compile and include vendor libraries

:star: Handle multiple testbenches with several user-defined wave views in a single run

:star: Display and save waveforms with GtkWave

:star: Diff simulation result waveforms

:star: Replay ILA / ChipScope captures in simulation


