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INPUT "MLP substream data";
OUTPUT iir_order[s][c],iir_shift[s][c],iir_coeff[s][c],iir_state[s][c];
VAR iir_order "IIR order";
VAR iir_shift "IIR shift";
VAR iir_coeff "IIR coefficient";
VAR iir_state "IIR state";
VAR coeff_bits "coeff bits";
VAR coeff_shift "coeff shift";
VAR state_bits "state bits";
VAR state_shift "state shift";
iir_order[s][c] <- read 4 unsigned;
assert iir_order[s][c] <= 8;
if iir_order[s][c] > 0 {
    iir_shift[s][c] <- read 4 unsigned;
    coeff_bits <- read 5 unsigned;
    coeff_shift <- read 3 unsigned;
    assert 1 < coeff_bits < 16;
    assert (coeff_bits + coeff_shift) <= 16;
    for i <- 0 to iir_order[s][c] {
        iir_coeff[s][c] <- (read (coeff_bits) signed) * 2 ^ coeff_shift;
    }
    if (read 1 unsigned) == 1 {
        state_bits <- read 4 unsigned;
        state_shift <- read 4 unsigned;
        for i <- iir_order[s][c] downto 0
            /*read state values in reverse order*/ {
            iir_state[s][c][i] <- (read (state_bits) signed) * 2 ^ state_shift;
        }
    } else {
        iir_state[s][c] <- [];
    }
} else {
    iir_shift[s][c] <- 0;
    iir_coeff[s][c] <- [];
    iir_state[s][c] <- [];
}
return iir_order[s][c],iir_shift[s][c],iir_coeff[s][c],iir_state[s][c];
