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import pytest

import numpy as np
from onnx import TensorProto, helper
from qonnx.core.datatype import DataType
from qonnx.core.modelwrapper import ModelWrapper
from qonnx.custom_op.registry import getCustomOp
from qonnx.transformation.general import GiveUniqueNodeNames
from qonnx.transformation.infer_datatypes import InferDataTypes
from qonnx.transformation.infer_shapes import InferShapes
from qonnx.util.basic import gen_finn_dt_tensor

import finn.core.onnx_exec as oxe
from finn.analysis.fpgadataflow.exp_cycles_per_layer import exp_cycles_per_layer
from finn.analysis.fpgadataflow.hls_synth_res_estimation import hls_synth_res_estimation
from finn.transformation.fpgadataflow.compile_cppsim import CompileCppSim
from finn.transformation.fpgadataflow.convert_to_hw_layers import InferThresholdingLayer
from finn.transformation.fpgadataflow.create_stitched_ip import CreateStitchedIP
from finn.transformation.fpgadataflow.hlssynth_ip import HLSSynthIP
from finn.transformation.fpgadataflow.prepare_cppsim import PrepareCppSim
from finn.transformation.fpgadataflow.prepare_ip import PrepareIP
from finn.transformation.fpgadataflow.prepare_rtlsim import PrepareRTLSim
from finn.transformation.fpgadataflow.set_exec_mode import SetExecMode
from finn.transformation.fpgadataflow.set_fifo_depths import InsertAndSetFIFODepths
from finn.transformation.fpgadataflow.specialize_layers import SpecializeLayers
from finn.transformation.streamline.round_thresholds import RoundAndClipThresholds

test_fpga_part = "xczu3eg-sbva484-1-e"
target_clk_ns = 5


def generate_random_threshold_values(
    data_type, num_input_channels, num_steps, narrow=False, per_tensor=False
):
    if per_tensor:
        num_input_channels = 1
    if narrow:
        num_steps -= 1

    return np.random.randint(
        data_type.min(),
        data_type.max() + 1,
        (num_input_channels, num_steps),
    ).astype(np.float32)


def sort_thresholds_increasing(thresholds):
    return np.sort(thresholds, axis=1)


def make_single_multithresholding_modelwrapper(
    thresholds,
    input_data_type,
    threshold_data_type,
    output_data_type,
    activation_bias,
    num_input_vecs,
    num_channels,
):
    inp = helper.make_tensor_value_info("inp", TensorProto.FLOAT, num_input_vecs + [num_channels])
    thresh = helper.make_tensor_value_info("thresh", TensorProto.FLOAT, thresholds.shape)
    outp = helper.make_tensor_value_info("outp", TensorProto.FLOAT, num_input_vecs + [num_channels])

    node_inp_list = ["inp", "thresh"]

    # Maps tensor rank to layout annotation
    rank_to_layout = {0: None, 1: "C", 2: "NC", 3: "NWC", 4: "NHWC"}
    # Lookup the layout required by this input shape
    data_layout = rank_to_layout[len(num_input_vecs + [num_channels])]

    Multithresholding_node = helper.make_node(
        "MultiThreshold",
        node_inp_list,
        ["outp"],
        domain="qonnx.custom_op.general",
        out_dtype=output_data_type.name,
        out_bias=float(activation_bias),
        out_scale=1.0,
        data_layout=data_layout,
    )

    graph = helper.make_graph(
        nodes=[Multithresholding_node],
        name="multithresholding_graph",
        inputs=[inp],
        outputs=[outp],
        value_info=[thresh],
    )

    model = helper.make_model(graph, producer_name="multithresholding-model")
    model = ModelWrapper(model)
    model = model.transform(InferShapes())
    model = model.transform(InferDataTypes())
    model = model.transform(GiveUniqueNodeNames())

    model.set_tensor_datatype("inp", input_data_type)
    model.set_tensor_datatype("outp", output_data_type)

    model.set_tensor_datatype("thresh", threshold_data_type)
    model.set_initializer("thresh", thresholds)
    return model


@pytest.mark.parametrize("num_input_channels", [6, 16])
@pytest.mark.parametrize(
    "num_input_vecs",
    [
        [1],
        [1, 2, 2],
    ],
)
@pytest.mark.parametrize("activation", [DataType["UINT4"], DataType["INT4"], DataType["BIPOLAR"]])
@pytest.mark.parametrize(
    "idt_tdt_cfg",
    [
        (DataType["INT8"], DataType["INT25"]),
        (DataType["UINT5"], DataType["UINT8"]),
    ],
)
@pytest.mark.parametrize("fold", [-1, 1, 2])
@pytest.mark.parametrize("narrow", [True, False])
@pytest.mark.parametrize("per_tensor", [True, False])
@pytest.mark.parametrize("impl_style", ["hls", "rtl"])
@pytest.mark.parametrize("exec_mode", ["cppsim", "rtlsim"])
@pytest.mark.parametrize("mem_mode", ["internal_embedded", "internal_decoupled"])
@pytest.mark.parametrize("round_thresh", [True, False])
@pytest.mark.fpgadataflow
@pytest.mark.vivado
@pytest.mark.slow
def test_fpgadataflow_thresholding(
    num_input_channels,
    num_input_vecs,
    activation,
    idt_tdt_cfg,
    fold,
    narrow,
    per_tensor,
    impl_style,
    exec_mode,
    mem_mode,
    round_thresh,
):
    # the mem_mode parameter can only be used for the hls thresholding
    # so the test will only be executed once for impl_style=rtl and once skipped
    # when the mem_mode is varied. Otherwise, the same test configuration would always
    # run twice.
    if impl_style == "rtl" and mem_mode == "internal_decoupled":
        pytest.skip(
            "Skip, because test is identical to impl_style=rtl and mem_mode=internal_embedded"
        )
    if narrow and activation == DataType["BIPOLAR"]:
        pytest.skip("Narrow needs to be false with biploar activation.")
    input_data_type, threshold_data_type = idt_tdt_cfg
    num_steps = activation.get_num_possible_values() - 1

    if fold == -1:
        fold = num_input_channels
    pe = num_input_channels // fold
    if num_input_channels % pe != 0:
        pytest.skip("Invalid folding configuration. Skipping test.")

    output_data_type = activation
    if activation == DataType["BIPOLAR"]:
        activation_bias = 0
    else:
        activation_bias = activation.min()
        if narrow and activation.signed():
            activation_bias += 1

    # Generate random thresholds and sort in ascending order
    thresholds = generate_random_threshold_values(
        threshold_data_type, num_input_channels, num_steps, narrow, per_tensor
    )

    # provide non-decreasing/ascending thresholds
    thresholds = sort_thresholds_increasing(thresholds)

    # Make a Multithreshold graph and convert to thresholding binary search node
    model = make_single_multithresholding_modelwrapper(
        thresholds,
        input_data_type,
        threshold_data_type,
        output_data_type,
        activation_bias,
        num_input_vecs,
        num_input_channels,
    )

    # calculate reference output
    x = gen_finn_dt_tensor(input_data_type, tuple(num_input_vecs + [num_input_channels]))

    input_dict = {model.graph.input[0].name: x}
    y_expected = oxe.execute_onnx(model, input_dict)[model.graph.output[0].name]

    if output_data_type == DataType["BIPOLAR"]:
        # binary to bipolar
        y_expected = 2 * y_expected - 1

    model = model.transform(InferThresholdingLayer())

    # Perform functional validation of the InferThresholdingLayer transform
    y_produced = oxe.execute_onnx(model, input_dict)[model.graph.output[0].name]
    assert (y_produced == y_expected).all()

    # Transform to the specified implementation style, either the
    # RTL or HLS according to test parameters
    node = model.get_nodes_by_op_type(model.graph.node[0].op_type)[0]
    inst = getCustomOp(node)
    inst.set_nodeattr("preferred_impl_style", impl_style)
    model = model.transform(SpecializeLayers(test_fpga_part))
    model = model.transform(InferShapes())
    assert model.graph.node[0].op_type == "Thresholding_" + str(impl_style)

    node = model.get_nodes_by_op_type(model.graph.node[0].op_type)[0]
    inst = getCustomOp(node)
    inst.set_nodeattr("PE", pe)
    if round_thresh is True:
        model = model.transform(RoundAndClipThresholds())
    model = model.transform(GiveUniqueNodeNames())

    if impl_style == "hls":
        inst.set_nodeattr("mem_mode", mem_mode)

    if exec_mode == "cppsim":
        model = model.transform(PrepareCppSim())
        model = model.transform(CompileCppSim())
        model = model.transform(SetExecMode("cppsim"))
    elif exec_mode == "rtlsim":
        model = model.transform(PrepareIP(test_fpga_part, target_clk_ns))
        model = model.transform(SetExecMode("rtlsim"))
        model = model.transform(HLSSynthIP())
        model = model.transform(PrepareRTLSim())

    y_produced = oxe.execute_onnx(model, input_dict)[model.graph.output[0].name]
    assert (y_produced == y_expected).all()

    if exec_mode == "rtlsim":
        if impl_style == "hls":
            hls_synt_res_est = model.analysis(hls_synth_res_estimation)
            assert model.graph.node[0].name in hls_synt_res_est
        node = model.get_nodes_by_op_type(model.graph.node[0].op_type)[0]
        inst = getCustomOp(node)
        cycles_rtlsim = inst.get_nodeattr("cycles_rtlsim")
        exp_cycles_dict = model.analysis(exp_cycles_per_layer)
        exp_cycles = exp_cycles_dict[node.name]
        assert np.isclose(exp_cycles, cycles_rtlsim, atol=15)
        assert exp_cycles != 0


@pytest.mark.parametrize("num_input_channels", [6])
@pytest.mark.parametrize(
    "num_input_vecs",
    [
        [1, 2, 2],
    ],
)
@pytest.mark.parametrize("activation", [DataType["INT4"]])
@pytest.mark.parametrize(
    "idt_tdt_cfg",
    [
        (DataType["INT8"], DataType["INT25"]),
    ],
)
@pytest.mark.parametrize("fold", [-1, 1, 2])
@pytest.mark.parametrize("ram_style", ["distributed", "block"])
@pytest.mark.parametrize("part", ["xcvc1902-vsva2197-2MP-e-S", "xczu7ev-ffvc1156-2-e"])
@pytest.mark.fpgadataflow
@pytest.mark.vivado
@pytest.mark.slow
def test_fpgadataflow_thresholding_stitched_ip(
    num_input_channels, num_input_vecs, activation, idt_tdt_cfg, fold, ram_style, part
):
    input_data_type, threshold_data_type = idt_tdt_cfg
    num_steps = activation.get_num_possible_values() - 1

    if fold == -1:
        fold = num_input_channels
    pe = num_input_channels // fold

    output_data_type = activation
    activation_bias = activation.min()

    # Generate random thresholds and sort in ascending order
    thresholds = generate_random_threshold_values(
        threshold_data_type, num_input_channels, num_steps, False, False
    )

    # provide non-decreasing/ascending thresholds
    thresholds = sort_thresholds_increasing(thresholds)

    # Make a Multithreshold graph and convert to thresholding binary search node
    model = make_single_multithresholding_modelwrapper(
        thresholds,
        input_data_type,
        threshold_data_type,
        output_data_type,
        activation_bias,
        num_input_vecs,
        num_input_channels,
    )

    # calculate reference output
    x = gen_finn_dt_tensor(input_data_type, tuple(num_input_vecs + [num_input_channels]))

    input_dict = {model.graph.input[0].name: x}
    y_expected = oxe.execute_onnx(model, input_dict)[model.graph.output[0].name]

    model = model.transform(InferThresholdingLayer())

    # Transform to the specified implementation style, either the
    # RTL or HLS according to test parameters
    node = model.get_nodes_by_op_type(model.graph.node[0].op_type)[0]
    inst = getCustomOp(node)
    inst.set_nodeattr("preferred_impl_style", "hls")
    model = model.transform(SpecializeLayers(part))
    model = model.transform(InferShapes())
    assert model.graph.node[0].op_type == "Thresholding_hls"

    node = model.get_nodes_by_op_type(model.graph.node[0].op_type)[0]
    inst = getCustomOp(node)
    inst.set_nodeattr("PE", pe)
    inst.set_nodeattr("mem_mode", "internal_decoupled")
    inst.set_nodeattr("ram_style", ram_style)

    model = model.transform(GiveUniqueNodeNames())
    # Run stitched-ip RTLsim to have memstream in the test loop
    model = model.transform(InsertAndSetFIFODepths(part, target_clk_ns))
    model = model.transform(PrepareIP(part, target_clk_ns))
    model = model.transform(HLSSynthIP())
    model = model.transform(CreateStitchedIP(part, target_clk_ns))
    model.set_metadata_prop("exec_mode", "rtlsim")

    exec_ctx_dict = {"global_in": x}

    y_produced = oxe.execute_onnx(model, exec_ctx_dict)["global_out"]

    assert (
        y_expected == y_produced
    ).all(), "Output of ONNX model not matching output of stitched-IP RTL model!"
