// Generated register defines for chik_vdf
#ifndef _CHIK_VDF_REG_DEFS_
#define _CHIK_VDF_REG_DEFS_

#ifdef __cplusplus
extern "C" {
#endif
// Register width
#define CHIK_VDF_PARAM_REG_WIDTH 32

// Control clocking and reset of the squaring engine
#define CHIK_VDF_CONTROL_REG_OFFSET 0x100000
#define CHIK_VDF_CONTROL_REG_RESVAL 0x10
#define CHIK_VDF_CONTROL_CLK_ENABLE_BIT 0
#define CHIK_VDF_CONTROL_RESET_BIT 4
#define CHIK_VDF_CONTROL_DIS_CG_GCD_BIT 8
#define CHIK_VDF_CONTROL_DIS_CG_GCDP_BIT 9
#define CHIK_VDF_CONTROL_DIS_CG_RECIP_BIT 10
#define CHIK_VDF_CONTROL_DIS_CG_DIV_BIT 11
#define CHIK_VDF_CONTROL_DIS_CG_MUL_BIT 12
#define CHIK_VDF_CONTROL_DIS_CG_RECIP_MUL_BIT 13
#define CHIK_VDF_CONTROL_DIS_CG_DIV_MUL_BIT 14

// Identifier for job being loaded into engine
#define CHIK_VDF_CMD_JOB_ID_REG_OFFSET 0x101000
#define CHIK_VDF_CMD_JOB_ID_REG_RESVAL 0x0

// Number of squaring operations in job (common parameters)
#define CHIK_VDF_CMD_ITER_COUNT_CMD_ITER_COUNT_FIELD_WIDTH 32
#define CHIK_VDF_CMD_ITER_COUNT_CMD_ITER_COUNT_FIELDS_PER_REG 1
#define CHIK_VDF_CMD_ITER_COUNT_MULTIREG_COUNT 2

// Number of squaring operations in job
#define CHIK_VDF_CMD_ITER_COUNT_0_REG_OFFSET 0x101004
#define CHIK_VDF_CMD_ITER_COUNT_0_REG_RESVAL 0x0

// Number of squaring operations in job
#define CHIK_VDF_CMD_ITER_COUNT_1_REG_OFFSET 0x101008
#define CHIK_VDF_CMD_ITER_COUNT_1_REG_RESVAL 0x0

// A input (common parameters)
#define CHIK_VDF_CMD_A_CMD_A_FIELD_WIDTH 32
#define CHIK_VDF_CMD_A_CMD_A_FIELDS_PER_REG 1
#define CHIK_VDF_CMD_A_MULTIREG_COUNT 21

// A input
#define CHIK_VDF_CMD_A_0_REG_OFFSET 0x10100c
#define CHIK_VDF_CMD_A_0_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_1_REG_OFFSET 0x101010
#define CHIK_VDF_CMD_A_1_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_2_REG_OFFSET 0x101014
#define CHIK_VDF_CMD_A_2_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_3_REG_OFFSET 0x101018
#define CHIK_VDF_CMD_A_3_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_4_REG_OFFSET 0x10101c
#define CHIK_VDF_CMD_A_4_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_5_REG_OFFSET 0x101020
#define CHIK_VDF_CMD_A_5_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_6_REG_OFFSET 0x101024
#define CHIK_VDF_CMD_A_6_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_7_REG_OFFSET 0x101028
#define CHIK_VDF_CMD_A_7_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_8_REG_OFFSET 0x10102c
#define CHIK_VDF_CMD_A_8_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_9_REG_OFFSET 0x101030
#define CHIK_VDF_CMD_A_9_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_10_REG_OFFSET 0x101034
#define CHIK_VDF_CMD_A_10_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_11_REG_OFFSET 0x101038
#define CHIK_VDF_CMD_A_11_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_12_REG_OFFSET 0x10103c
#define CHIK_VDF_CMD_A_12_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_13_REG_OFFSET 0x101040
#define CHIK_VDF_CMD_A_13_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_14_REG_OFFSET 0x101044
#define CHIK_VDF_CMD_A_14_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_15_REG_OFFSET 0x101048
#define CHIK_VDF_CMD_A_15_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_16_REG_OFFSET 0x10104c
#define CHIK_VDF_CMD_A_16_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_17_REG_OFFSET 0x101050
#define CHIK_VDF_CMD_A_17_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_18_REG_OFFSET 0x101054
#define CHIK_VDF_CMD_A_18_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_19_REG_OFFSET 0x101058
#define CHIK_VDF_CMD_A_19_REG_RESVAL 0x0

// A input
#define CHIK_VDF_CMD_A_20_REG_OFFSET 0x10105c
#define CHIK_VDF_CMD_A_20_REG_RESVAL 0x0

// F input (common parameters)
#define CHIK_VDF_CMD_F_CMD_F_FIELD_WIDTH 32
#define CHIK_VDF_CMD_F_CMD_F_FIELDS_PER_REG 1
#define CHIK_VDF_CMD_F_MULTIREG_COUNT 21

// F input
#define CHIK_VDF_CMD_F_0_REG_OFFSET 0x101060
#define CHIK_VDF_CMD_F_0_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_1_REG_OFFSET 0x101064
#define CHIK_VDF_CMD_F_1_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_2_REG_OFFSET 0x101068
#define CHIK_VDF_CMD_F_2_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_3_REG_OFFSET 0x10106c
#define CHIK_VDF_CMD_F_3_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_4_REG_OFFSET 0x101070
#define CHIK_VDF_CMD_F_4_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_5_REG_OFFSET 0x101074
#define CHIK_VDF_CMD_F_5_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_6_REG_OFFSET 0x101078
#define CHIK_VDF_CMD_F_6_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_7_REG_OFFSET 0x10107c
#define CHIK_VDF_CMD_F_7_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_8_REG_OFFSET 0x101080
#define CHIK_VDF_CMD_F_8_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_9_REG_OFFSET 0x101084
#define CHIK_VDF_CMD_F_9_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_10_REG_OFFSET 0x101088
#define CHIK_VDF_CMD_F_10_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_11_REG_OFFSET 0x10108c
#define CHIK_VDF_CMD_F_11_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_12_REG_OFFSET 0x101090
#define CHIK_VDF_CMD_F_12_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_13_REG_OFFSET 0x101094
#define CHIK_VDF_CMD_F_13_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_14_REG_OFFSET 0x101098
#define CHIK_VDF_CMD_F_14_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_15_REG_OFFSET 0x10109c
#define CHIK_VDF_CMD_F_15_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_16_REG_OFFSET 0x1010a0
#define CHIK_VDF_CMD_F_16_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_17_REG_OFFSET 0x1010a4
#define CHIK_VDF_CMD_F_17_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_18_REG_OFFSET 0x1010a8
#define CHIK_VDF_CMD_F_18_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_19_REG_OFFSET 0x1010ac
#define CHIK_VDF_CMD_F_19_REG_RESVAL 0x0

// F input
#define CHIK_VDF_CMD_F_20_REG_OFFSET 0x1010b0
#define CHIK_VDF_CMD_F_20_REG_RESVAL 0x0

// D input (common parameters)
#define CHIK_VDF_CMD_D_CMD_D_FIELD_WIDTH 32
#define CHIK_VDF_CMD_D_CMD_D_FIELDS_PER_REG 1
#define CHIK_VDF_CMD_D_MULTIREG_COUNT 41

// D input
#define CHIK_VDF_CMD_D_0_REG_OFFSET 0x1010b4
#define CHIK_VDF_CMD_D_0_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_1_REG_OFFSET 0x1010b8
#define CHIK_VDF_CMD_D_1_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_2_REG_OFFSET 0x1010bc
#define CHIK_VDF_CMD_D_2_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_3_REG_OFFSET 0x1010c0
#define CHIK_VDF_CMD_D_3_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_4_REG_OFFSET 0x1010c4
#define CHIK_VDF_CMD_D_4_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_5_REG_OFFSET 0x1010c8
#define CHIK_VDF_CMD_D_5_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_6_REG_OFFSET 0x1010cc
#define CHIK_VDF_CMD_D_6_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_7_REG_OFFSET 0x1010d0
#define CHIK_VDF_CMD_D_7_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_8_REG_OFFSET 0x1010d4
#define CHIK_VDF_CMD_D_8_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_9_REG_OFFSET 0x1010d8
#define CHIK_VDF_CMD_D_9_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_10_REG_OFFSET 0x1010dc
#define CHIK_VDF_CMD_D_10_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_11_REG_OFFSET 0x1010e0
#define CHIK_VDF_CMD_D_11_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_12_REG_OFFSET 0x1010e4
#define CHIK_VDF_CMD_D_12_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_13_REG_OFFSET 0x1010e8
#define CHIK_VDF_CMD_D_13_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_14_REG_OFFSET 0x1010ec
#define CHIK_VDF_CMD_D_14_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_15_REG_OFFSET 0x1010f0
#define CHIK_VDF_CMD_D_15_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_16_REG_OFFSET 0x1010f4
#define CHIK_VDF_CMD_D_16_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_17_REG_OFFSET 0x1010f8
#define CHIK_VDF_CMD_D_17_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_18_REG_OFFSET 0x1010fc
#define CHIK_VDF_CMD_D_18_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_19_REG_OFFSET 0x101100
#define CHIK_VDF_CMD_D_19_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_20_REG_OFFSET 0x101104
#define CHIK_VDF_CMD_D_20_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_21_REG_OFFSET 0x101108
#define CHIK_VDF_CMD_D_21_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_22_REG_OFFSET 0x10110c
#define CHIK_VDF_CMD_D_22_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_23_REG_OFFSET 0x101110
#define CHIK_VDF_CMD_D_23_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_24_REG_OFFSET 0x101114
#define CHIK_VDF_CMD_D_24_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_25_REG_OFFSET 0x101118
#define CHIK_VDF_CMD_D_25_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_26_REG_OFFSET 0x10111c
#define CHIK_VDF_CMD_D_26_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_27_REG_OFFSET 0x101120
#define CHIK_VDF_CMD_D_27_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_28_REG_OFFSET 0x101124
#define CHIK_VDF_CMD_D_28_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_29_REG_OFFSET 0x101128
#define CHIK_VDF_CMD_D_29_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_30_REG_OFFSET 0x10112c
#define CHIK_VDF_CMD_D_30_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_31_REG_OFFSET 0x101130
#define CHIK_VDF_CMD_D_31_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_32_REG_OFFSET 0x101134
#define CHIK_VDF_CMD_D_32_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_33_REG_OFFSET 0x101138
#define CHIK_VDF_CMD_D_33_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_34_REG_OFFSET 0x10113c
#define CHIK_VDF_CMD_D_34_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_35_REG_OFFSET 0x101140
#define CHIK_VDF_CMD_D_35_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_36_REG_OFFSET 0x101144
#define CHIK_VDF_CMD_D_36_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_37_REG_OFFSET 0x101148
#define CHIK_VDF_CMD_D_37_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_38_REG_OFFSET 0x10114c
#define CHIK_VDF_CMD_D_38_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_39_REG_OFFSET 0x101150
#define CHIK_VDF_CMD_D_39_REG_RESVAL 0x0

// D input
#define CHIK_VDF_CMD_D_40_REG_OFFSET 0x101154
#define CHIK_VDF_CMD_D_40_REG_RESVAL 0x0

// L input (common parameters)
#define CHIK_VDF_CMD_L_CMD_L_FIELD_WIDTH 32
#define CHIK_VDF_CMD_L_CMD_L_FIELDS_PER_REG 1
#define CHIK_VDF_CMD_L_MULTIREG_COUNT 11

// L input
#define CHIK_VDF_CMD_L_0_REG_OFFSET 0x101158
#define CHIK_VDF_CMD_L_0_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_1_REG_OFFSET 0x10115c
#define CHIK_VDF_CMD_L_1_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_2_REG_OFFSET 0x101160
#define CHIK_VDF_CMD_L_2_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_3_REG_OFFSET 0x101164
#define CHIK_VDF_CMD_L_3_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_4_REG_OFFSET 0x101168
#define CHIK_VDF_CMD_L_4_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_5_REG_OFFSET 0x10116c
#define CHIK_VDF_CMD_L_5_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_6_REG_OFFSET 0x101170
#define CHIK_VDF_CMD_L_6_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_7_REG_OFFSET 0x101174
#define CHIK_VDF_CMD_L_7_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_8_REG_OFFSET 0x101178
#define CHIK_VDF_CMD_L_8_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_9_REG_OFFSET 0x10117c
#define CHIK_VDF_CMD_L_9_REG_RESVAL 0x0

// L input
#define CHIK_VDF_CMD_L_10_REG_OFFSET 0x101180
#define CHIK_VDF_CMD_L_10_REG_RESVAL 0x0

// Write to start engine
#define CHIK_VDF_CMD_START_REG_OFFSET 0x101184
#define CHIK_VDF_CMD_START_REG_RESVAL 0x0
#define CHIK_VDF_CMD_START_START_BIT 0

// Identifier of job for which status is being reported
#define CHIK_VDF_STATUS_JOB_ID_REG_OFFSET 0x102000
#define CHIK_VDF_STATUS_JOB_ID_REG_RESVAL 0x0

// Iteration within job for which status is being reported (common
// parameters)
#define CHIK_VDF_STATUS_ITER_STATUS_ITER_FIELD_WIDTH 32
#define CHIK_VDF_STATUS_ITER_STATUS_ITER_FIELDS_PER_REG 1
#define CHIK_VDF_STATUS_ITER_MULTIREG_COUNT 2

// Iteration within job for which status is being reported
#define CHIK_VDF_STATUS_ITER_0_REG_OFFSET 0x102004
#define CHIK_VDF_STATUS_ITER_0_REG_RESVAL 0x0

// Iteration within job for which status is being reported
#define CHIK_VDF_STATUS_ITER_1_REG_OFFSET 0x102008
#define CHIK_VDF_STATUS_ITER_1_REG_RESVAL 0x0

// A result. (common parameters)
#define CHIK_VDF_STATUS_A_STATUS_A_FIELD_WIDTH 32
#define CHIK_VDF_STATUS_A_STATUS_A_FIELDS_PER_REG 1
#define CHIK_VDF_STATUS_A_MULTIREG_COUNT 21

// A result.
#define CHIK_VDF_STATUS_A_0_REG_OFFSET 0x10200c
#define CHIK_VDF_STATUS_A_0_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_1_REG_OFFSET 0x102010
#define CHIK_VDF_STATUS_A_1_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_2_REG_OFFSET 0x102014
#define CHIK_VDF_STATUS_A_2_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_3_REG_OFFSET 0x102018
#define CHIK_VDF_STATUS_A_3_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_4_REG_OFFSET 0x10201c
#define CHIK_VDF_STATUS_A_4_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_5_REG_OFFSET 0x102020
#define CHIK_VDF_STATUS_A_5_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_6_REG_OFFSET 0x102024
#define CHIK_VDF_STATUS_A_6_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_7_REG_OFFSET 0x102028
#define CHIK_VDF_STATUS_A_7_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_8_REG_OFFSET 0x10202c
#define CHIK_VDF_STATUS_A_8_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_9_REG_OFFSET 0x102030
#define CHIK_VDF_STATUS_A_9_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_10_REG_OFFSET 0x102034
#define CHIK_VDF_STATUS_A_10_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_11_REG_OFFSET 0x102038
#define CHIK_VDF_STATUS_A_11_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_12_REG_OFFSET 0x10203c
#define CHIK_VDF_STATUS_A_12_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_13_REG_OFFSET 0x102040
#define CHIK_VDF_STATUS_A_13_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_14_REG_OFFSET 0x102044
#define CHIK_VDF_STATUS_A_14_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_15_REG_OFFSET 0x102048
#define CHIK_VDF_STATUS_A_15_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_16_REG_OFFSET 0x10204c
#define CHIK_VDF_STATUS_A_16_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_17_REG_OFFSET 0x102050
#define CHIK_VDF_STATUS_A_17_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_18_REG_OFFSET 0x102054
#define CHIK_VDF_STATUS_A_18_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_19_REG_OFFSET 0x102058
#define CHIK_VDF_STATUS_A_19_REG_RESVAL 0x0

// A result.
#define CHIK_VDF_STATUS_A_20_REG_OFFSET 0x10205c
#define CHIK_VDF_STATUS_A_20_REG_RESVAL 0x0

// F result. (common parameters)
#define CHIK_VDF_STATUS_F_STATUS_F_FIELD_WIDTH 32
#define CHIK_VDF_STATUS_F_STATUS_F_FIELDS_PER_REG 1
#define CHIK_VDF_STATUS_F_MULTIREG_COUNT 21

// F result.
#define CHIK_VDF_STATUS_F_0_REG_OFFSET 0x102060
#define CHIK_VDF_STATUS_F_0_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_1_REG_OFFSET 0x102064
#define CHIK_VDF_STATUS_F_1_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_2_REG_OFFSET 0x102068
#define CHIK_VDF_STATUS_F_2_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_3_REG_OFFSET 0x10206c
#define CHIK_VDF_STATUS_F_3_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_4_REG_OFFSET 0x102070
#define CHIK_VDF_STATUS_F_4_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_5_REG_OFFSET 0x102074
#define CHIK_VDF_STATUS_F_5_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_6_REG_OFFSET 0x102078
#define CHIK_VDF_STATUS_F_6_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_7_REG_OFFSET 0x10207c
#define CHIK_VDF_STATUS_F_7_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_8_REG_OFFSET 0x102080
#define CHIK_VDF_STATUS_F_8_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_9_REG_OFFSET 0x102084
#define CHIK_VDF_STATUS_F_9_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_10_REG_OFFSET 0x102088
#define CHIK_VDF_STATUS_F_10_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_11_REG_OFFSET 0x10208c
#define CHIK_VDF_STATUS_F_11_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_12_REG_OFFSET 0x102090
#define CHIK_VDF_STATUS_F_12_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_13_REG_OFFSET 0x102094
#define CHIK_VDF_STATUS_F_13_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_14_REG_OFFSET 0x102098
#define CHIK_VDF_STATUS_F_14_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_15_REG_OFFSET 0x10209c
#define CHIK_VDF_STATUS_F_15_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_16_REG_OFFSET 0x1020a0
#define CHIK_VDF_STATUS_F_16_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_17_REG_OFFSET 0x1020a4
#define CHIK_VDF_STATUS_F_17_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_18_REG_OFFSET 0x1020a8
#define CHIK_VDF_STATUS_F_18_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_19_REG_OFFSET 0x1020ac
#define CHIK_VDF_STATUS_F_19_REG_RESVAL 0x0

// F result.
#define CHIK_VDF_STATUS_F_20_REG_OFFSET 0x1020b0
#define CHIK_VDF_STATUS_F_20_REG_RESVAL 0x0

// Dummy register locating the end of the status registers
#define CHIK_VDF_STATUS_END_REG_OFFSET 0x1020b4
#define CHIK_VDF_STATUS_END_REG_RESVAL 0x0
#define CHIK_VDF_STATUS_END_STATUS_END_BIT 0

// Temporary read/write space for verification
#define CHIK_VDF_RW_REG_OFFSET 0x10fff8
#define CHIK_VDF_RW_REG_RESVAL 0x0

// Mark the end of the address space
#define CHIK_VDF_END_OF_RANGE_REG_OFFSET 0x10fffc
#define CHIK_VDF_END_OF_RANGE_REG_RESVAL 0x0
#define CHIK_VDF_END_OF_RANGE_MARKER_BIT 0

#ifdef __cplusplus
}  // extern "C"
#endif
#endif  // _CHIK_VDF_REG_DEFS_
// End generated register defines for chik_vdf
