Possible Instructions

Opcode | Instruction | Operation/Description | State
N | Z | V | T
00000 | NOP | No operation (do nothing) |  |  |  |
00001 | HALT | Stop definitely the CPU |  |  |  |
00010 | MOV Dest, Src | Dest := Src (attribution) |  |  |  |
00011 | JZ Addr | PC:=Addr, if Z=1 (jump if operation resulted in zero) |  |  |  |
JE Addr | PC:=Addr, if Z=1 (jump if Op1 == Op2 after CMP) |  |  |  |
00100 | JNZ Addr | PC:=Addr, if Z=0 (jump if operation resulted in non zero) |  |  |  |
JNE Addr | PC:=Addr, if Z=0 (jump if Op1 != Op2 after CMP) |  |  |  |
00101 | JN Addr | PC:=Addr, if N=1 (jump if operation resulted in negative) |  |  |  |
JLT Addr | PC:=Addr, if N=1 (jump if Op1 < Op2 after CMP) |  |  |  |
00110 | JP Addr | PC:=Addr, if Z=0 e N=0 (jump if operation resulted in positive) |  |  |  |
JGT Addr | PC:=Addr, if Z=0 e N=0 (jump if Op1 > Op2 após CMP) |  |  |  |
00111 | JGE Addr | PC:=Addr, if N=0 (jump if Op1 >= Op2 em CMP) |  |  |  |
01000 | JLE Addr | PC:=Addr, if Z=1 ou N=1 (jump if Op1 <= Op2 em CMP) |  |  |  |
01001 | JV Addr | PC:=Addr, if V=1 (jump if detected overflow) |  |  |  |
01010 | JT Addr | PC:=Addr, if T=1 (jump if detected transport) |  |  |  |
01011 | JMP Addr | PC:=Addr (unconditional jump) |  |  |  |
01100 | SHR Op, Quant | Op := Op >> Quant (bitwise right shift) |  | ✓ |  |
01101 | SHL Op, Quant | Op := Op << Quant (bitwise left shift) |  | ✓ |  |
10000 | ADD Dest, Src | Dest := Dest + Src (sum) |  | ✓ | ✓ |
10001 | INC Op | Op := Op + 1 (increment) |  | ✓ | ✓ |
10010 | DEC Op | Op := Op – 1 (decrement) |  | ✓ | ✓ |
10011 | SUB Dest, Src | Dest := Dest – Src (subtraction) |  | ✓ | ✓ |
10100 | MUL Dest, Src | Dest := Dest * Src (multiplication) |  | ✓ |  | ✓
IMUL Dest, Src | Dest := Dest * Src (signed multiplication) | ✓ | ✓ | ✓ |
10101 | OR Dest, Src | Dest := Dest | Src (bitwise OR) |  | ✓ |  |
10110 | AND Dest, Src | Dest := Dest & Src (bitwise AND) |  | ✓ |  |
10111 | NOT Op | Op := ~Op (one's complement – invert each bit) |  | ✓ |  |
11000 | XOR Dest, Src | Dest := Dest ^ Src (bitwise exclusive OR) |  | ✓ |  |
11001 | DIV Dest, Src | Dest := Dest DIV Src (quotient) |  | ✓ |  |
IDIV Dest, Src | Dest := Dest DIV Src (signed quotient) | ✓ | ✓ |  |
11010 | MOD Dest, Src | Dest := Dest MOD Src (division remainder) |  | ✓ |  |
IMOD Dest, Src | Dest := Dest MOD Src (signed division remainder) | ✓ | ✓ |  |
11011 | CMP Op1, Op2 | Comparison | ✓ | ✓ |  |
ICMP Op1, Op2 | Signed comparison | ✓ | ✓ |  |